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HCF40104B Dataheets PDF



Part Number HCF40104B
Manufacturers STMicroelectronics
Logo STMicroelectronics
Description 4-BIT BIDIRECTIONAL UNIVERSAL SHIFT REGISTER
Datasheet HCF40104B DatasheetHCF40104B Datasheet (PDF)

HCC/HCF40104B HCC/HCF40194B 4-BIT BIDIRECTIONAL UNIVERSAL SHIFT REGISTER . . . . . . . . . . . MEDIUM-SPEED OPERATION : fCL = 9MHz (typ.) @ VDD = 10V FULLY STATIC OPERATION SYNCHRONOUS PARALLEL OR SERIAL OPERATION THREE-STATE OUTPUTS (HCC/HCF40104B) ASYNCHRONOUS MASTER RESET (HCC/HCF40194B) STANDARDIZED, SYMMETRICAL OUTPUT CHARACTERISTICS QUIESCENT CURRENT AT 20V FOR HCC DEVICE 5V, 10V, AND 15V PARAMETRIC RATINGS INPUT CURRENT OF 100nA AT 18V AND 25°C FOR HCC DEVICE 100% TESTED FOR QUIESCENT C.

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HCC/HCF40104B HCC/HCF40194B 4-BIT BIDIRECTIONAL UNIVERSAL SHIFT REGISTER . . . . . . . . . . . MEDIUM-SPEED OPERATION : fCL = 9MHz (typ.) @ VDD = 10V FULLY STATIC OPERATION SYNCHRONOUS PARALLEL OR SERIAL OPERATION THREE-STATE OUTPUTS (HCC/HCF40104B) ASYNCHRONOUS MASTER RESET (HCC/HCF40194B) STANDARDIZED, SYMMETRICAL OUTPUT CHARACTERISTICS QUIESCENT CURRENT AT 20V FOR HCC DEVICE 5V, 10V, AND 15V PARAMETRIC RATINGS INPUT CURRENT OF 100nA AT 18V AND 25°C FOR HCC DEVICE 100% TESTED FOR QUIESCENT CURRENT MEETS ALL REQUIREMENTS OF JEDEC TENTATIVE STANDARD N° 13A, ”STANDARD SPECIFICATIONS FOR DESCRIPTION OF ”B” SERIES CMOS DEVICES” EY (Plastic Package) F (Ceramic Package) C1 (Plastic Chip Carrier ) ORDER CODES : HCC401XXBF HCF401XXBEY HCF401XXBC1 DESCRIPTION The HCC40104B, HCC40194B, (extended temperature range) and the HCC40104B, HCF40194B (intermediate temperature range) are monolithic integrated circuits, available in 16-lead dual in-line plastic or ceramic package and plastic micro package. The HCC/HCF 40104B is a universal shift register featuring parallel inputs, parallel outputs, SHIFT RIGHT and SHIFT LEFT serial inputs, and a high-impedance third output state allowing the device to be used in bus-organized systems. In the parallel-load mode (S0 and S1 are high), data is loaded into the associated flip-flop and appears at the output after the positive transition of the CLOCK input. During loading, serial data flow is inhibited. Shift-right and shift-left are accomplished synchronously on the positive clock edge with serial data entered at the SHIFT RIGHT and SHIFT LEFT serial inputs, respectively. Clearing the register is accomplished by setting both mode controls low and clocking the register. When the output enable input is low, all outputs assume the high impedance state. The HCC/HCF40194B is a universal shift register featuring parallel inputs, parallel outputs SHIFT RIGHT and SHIFT LEFT serial inputs, and a direct overriding clear input. In the parallel-load mode (S0 and S1 are high), data is loaded into the associated flip-flop and June 1989 PIN CONNECTIONS 40104B 40194B 1/12 HCC/HCF40104B/40194B appears at the output after the positive transition of the CLOCK input. During loading, serial data flow is inhibited. Shift right and shift left are accomplished synchronously on the positive clock edge with data entered at the SHIFT RIGHT and SHIFT LEFT serial FUNCTIONAL DIAGRAMS 40104B 40194B inputs, respectively. Clocking of the register is inhibited when both mode control inputs are low. When low, the RESET input resets all stages and forces all outputs low. The HCC/HCF40194B is similar to industry types 340194 and MC40194. ABSOLUTE MAXIMUM RATINGS Symbol V DD * Vi II Pt o t Parameter Supply Voltage : H CC Types H C F Types Input Voltage DC Input Current (any one input) Total Power Dissipation (per package) Dissipation per Output Transistor for T o p = Full Package-temperature Range Operating Temperature : H CC Types H C F Types Storage Temperature Value – 0.5 to + 20 – 0.5 to + 18 – 0.5 to V DD + 0.5 ± 10 200 100 – 55 to + 125 – 40 to + 85 – 65 to + 150 Unit V V V mA mW mW °C °C °C To p T stg Stresses above those listed under ”Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for external periods may affect device reliability. * All voltages values are referred to VSS pin voltage. RECOMMENDED OPERATING CONDITIONS Symbol V DD VI To p Parameter Supply Voltage : HC C Types H C F Types Input Voltage Operating Temperature : H CC Types H C F Types Value 3 to 18 3 to 15 0 to V DD – 55 to + 125 – 40 to + 85 Unit V V V °C °C 2/12 HCC/HCF40104B/40194B LOGIC DIAGRAMS 40104B 3/12 HCC/HCF40104B/40194B LOGIC DIAGRAMS 40194B 4/12 HCC/HCF40104B/40194B STATIC ELECTRICAL CHARACTERISTICS (over recommended operating conditions) Test Conditions Symbol Parameter VI (V) 0/ 5 HCC Types 0/15 0/20 0/ 5 HCF 0/10 Types 0/15 V OH Output High Voltage 0/ 5 0/10 0/15 V OL Output Low Voltage 5/0 10/0 15/0 V IH Input High Voltage 0.5/4.5 1/9 4.5/0.5 9/1 0/ 5 HCC Types 0/10 0/15 0/ 5 0/ 5 HCF Types 0/10 0/15 I OL Output Sink Current 0/ 5 HCC 0/10 Types 0/15 0/ 5 HCF 0/10 Types 0/15 I IH , I IL Input Leakage Current HCC 0/18 Types HCF 0/15 Types Any Input 0/ 5 2.5 4.6 9.5 13.5 2.5 4.6 9.5 13.5 0.4 0.5 1.5 0.4 0.5 1.5 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 0/10 VO (V) Value Unit |I O | V D D T L o w* 25 ° C T Hi g h * ( µA) (V) Min. Max. Min. Typ. Max. Min. Max. 5 10 15 20 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 5 5 10 15 5 5 10 15 5 10 15 5 10 15 18 Any Input 15 ± 0.3 ± 10 5 –5 IL Quiescent Current 5 10 20 100 20 40 80 4.95 9.95 14.95 0.05 0.05 0.05 3.5 7 11 1.5 3 4 – 2 – 0.64 – 1.6 – 4.2 – 1.53 – 0.52 – 1.3 – 3.6 0.64 1.6 4.2 0.52 1.3 3.6 ± 0.1 3.5 7 11 4.95 9.95 14.95 0..


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