Document No.: FT_000060
FT4232H QUAD HIGH SPEED USB TO MULTIPURPOSE UART/MPSSE IC
Datasheet Version 2.07
Clearance No.: FTDI#78
4.4.1 MPSSE Adaptive Clocking
Adaptive clocking is a new MPSSE feature added to the FT24232H MPSSE engine.
The mode is effectively handshaking the CLK signal with a return clock RTCK. This is a technique used by
The FT4232H will assert the CLK line and wait for the RTCK to be returned from the target device to
GPIOL3 line before changing the TDO (data out line).
Figure 4.5 Adaptive Clocking Interconnect
TDO changes on falling
edge of TCK
Figure 4.6: Adaptive Clocking waveform.
Adaptive clocking is not enabled by default.
See: AN_108 Command Processor for MPSSE and MCU Host Bus Emulation Modes.
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