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N25Q128A Dataheets PDF



Part Number N25Q128A
Manufacturers Micron
Logo Micron
Description NOR Flash Memory
Datasheet N25Q128A DatasheetN25Q128A Datasheet (PDF)

128Mb, Multiple I/O Serial Flash Memory Features Micron Serial NOR Flash Memory 1.8V, Multiple I/O, 4KB Sector Erase N25Q128A Features • SPI-compatible serial bus interface • 108 MHz (MAX) clock frequency • 1.7–2.0V single supply voltage • Dual/quad I/O instruction provides increased throughput up to 432 MHz • Supported protocols – Extended SPI, dual I/O, and quad I/O • Execute-in-place (XIP) mode for all three protocols – Configurable via volatile or nonvolatile registers – Enables memory to w.

  N25Q128A   N25Q128A


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128Mb, Multiple I/O Serial Flash Memory Features Micron Serial NOR Flash Memory 1.8V, Multiple I/O, 4KB Sector Erase N25Q128A Features • SPI-compatible serial bus interface • 108 MHz (MAX) clock frequency • 1.7–2.0V single supply voltage • Dual/quad I/O instruction provides increased throughput up to 432 MHz • Supported protocols – Extended SPI, dual I/O, and quad I/O • Execute-in-place (XIP) mode for all three protocols – Configurable via volatile or nonvolatile registers – Enables memory to work in XIP mode directly af- ter power-on • PROGRAM/ERASE SUSPEND operations • Continuous read of entire memory via a single com- mand – Fast read – Quad or dual output fast read – Quad or dual I/O fast read • Flexible to fit application – Configurable number of dummy cycles – Output buffer configurable • Software reset • 64-byte, user-lockable, one-time programmable (OTP) dedicated area • Erase capability – Subsector erase 4KB uniform granularity blocks – Sector erase 64KB uniform granularity blocks – Full-chip erase • Write protection – Software write protection applicable to every 64KB sector via volatile lock bit – Hardware write protection: protected area size defined by five nonvolatile bits (BP0, BP1, BP2, BP3, and TB) – Additional smart protections, available upon request • Electronic signature – JEDEC-standard 2-byte signature (BB18h) – Unique ID code (UID): 17 read-only bytes, including: • Two additional extended device ID (EDID) bytes to identify device factory options • Customized factory data (14 bytes) • Minimum 100,000 ERASE cycles per sector • More than 20 years data retention • Packages JEDEC standard, all RoHS compliant – F7 = V-PDFN-8 6mm x 5mm Sawn (MLP8 6mm x 5mm) – F8 = V-PDFN-8 8mm x 6mm (MLP8 8mm x 6mm) – 12 = T-PBGA-24b05 6mm x 8mm – SF = SOP2-16 300 mils body width (SO16W) – SE = SOP2-8 208 mils body width (SO8W) PDF: 09005aef845665f6 n25q_128mb_1_8v_65nm.pdf - Rev. Q 11/14 EN 1 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2012 Micron Technology, Inc. All rights reserved. Products and specifications discussed herein are subject to change by Micron without notice. 128Mb, Multiple I/O Serial Flash Memory Features Contents Device Description ........................................................................................................................................... 6 Features ....................................................................................................................................................... 6 Operating Protocols ...................................................................................................................................... 6 XIP Mode ..................................................................................................................................................... 6 Device Configurability .................................................................................................................................. 7 Signal Assignments ........................................................................................................................................... 8 Signal Descriptions ......................................................................................................................................... 10 Memory Organization .................................................................................................................................... 12 Memory Configuration and Block Diagram .................................................................................................. 12 Memory Map – 128Mb Density ....................................................................................................................... 13 Device Protection ........................................................................................................................................... 14 Serial Peripheral Interface Modes .................................................................................................................... 17 SPI Protocols .................................................................................................................................................. 19 Nonvolatile and Volatile Registers ................................................................................................................... 20 Status Register ............................................................................................................................................ 21 Nonvolatile and Volatile Configuration Registers .......................................................................................... 22 Enhanced Volatile Configuration Register .................................................................................................... 25 Flag Status Register ...............


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