HCC40105B

HCC40105B HCF40105B FIFO REGISTER . . . . . . . . . . . INDEPENDENT ASYNCHRONOUS INPUTS AND OUTPUTS 3-STATE OUTPUTS EXPANDABLE IN EITHER DIRECTION STATUS INDICATORS ON INPUT AND OUTPUT RESET CAPABILITY STANDARDIZED, SYMMETRICAL OUTPUT CHARACTERISTICS QUIESCENT CURRENT SPECIFIED AT 20V FOR HCC DEVICE 5V, 10V, AND 15V PARAMETRIC RATINGS INPUT CURRENT OF 100nA AT 18V AND 25°C FOR HCC DEVICE 100% TESTED FOR QUIESCENT CURRENT MEETS ALL REQUIREMENTS OF JEDEC TENTATIVE STANDARD No 13A, ”STANDARD SPECIFICATIONS FOR DESCRIPTION OF ”B” SERIES CMOS DEVICES” READY) indicates if the FIFO contains data. As the earliest data are removed from the bottom of the data stack (the output end), all data entered later will automatically propagate (ripple) toward the output. EY (Plastic Package) F (Ceramic Package) C1 (Chip Carrier) ORDER CODES : HCC40105BF HCF40105BEY HCF40105BC1 DESCRIPTION The HCC40105B (extended temperature range) and HCF40105B (intermediate temperature range) are monolithic integrated circuits, available in 16-lead dual in-line plastic or ceramic package. The HCC/HCF40105B is a low-power first-in-first-out (FIFO) ”elastic” storage register that can store 16 4-bit words. It is capable of handling input and output data at different shifting rates. This feature makes it particularly useful as a buffer between asynchronous systems. Each word position in the register is clocked by a control flip-flop, which stores a marker bit. A ”1” signifies that the position’s data is fill...