HC6094

Semiconductor February 1999 T UCT ROD ACEMEN 47 P E 7 T L OLE REP 00-442-7 OBS ENDED 8 M ns 1 .com COM pplicatio @harris E R NO ntral A entapp Ce : c Call or email HC6094 ADSL Analog Front End Chip VSSA_RX D0 (LSB) PGAI+ PGAO+ VDDA_RX PGAO- [ /Title (HC60 94) /Subject (ADSL Analog Front End Chip) /Autho r () /Keywords (Harris Semiconductor, Telecom, SLICs, SLACs , Telephone, Telephony, WLL, Wireless Local Loop, PBX, Private Branch Exchan ge, NT1+, CO, Cen- Features 14-Bit 5 MSPS DAC Programmable Gain Stages Anti-Aliasing and Reconstruction Filters Description The HC6094 performs the Analog processing for the ADSL chip set. The transmit chain has a 14 Bit DAC, a third-order Chebyshev reconstruction filter and a programmable attenuator (-12 to 0dB) capable of driving a 220Ω differential load. The receiver chain has a high impedance input stage, programmable gain stage (0 to 24dB), additional programmable gain (-9 to 18dB) and a third-order Chebyshev anti-aliasing filter for driving an off-chip A/D. Laser trimmable thin-film resistors are used to set the filter cutoff frequency and DAC linearity. The transmit and receive signal chains are specified at 65dB MTPR. Applications FDM DMT ADSL CAP ADSL EC DMT ADSL Communications Receiver Ordering Information PART NUMBER HC6094IN TEMP. RANGE (oC) -40 to 85 PACKAGE 44 Ld MQFP PKG. NO. Q44.10x10 Pinout HC6094 (MQFP) TOP VIEW VDDA_ATT D13 (MSB) GNDD_TX GNDA_TX VDDD_TX CTLOUT CTLIN D11 D10 D9 D8 D7 D6 D5 D4 D3 D2...