AS5SP256K36

COTS PEM SSRAM AS5SP256K36 9.0Mb, 256K x 36, Synchronous SRAM Pipeline Burst, Single Cycle Deselect FEATURES Synchronous Operation in relation to the input Clock 2 Stage Registers resulting in Pipeline operation On chip address counter (base +3) for Burst operations Self-Timed Write Cycles On-Chip Address and Control Registers Byte Write support Global Write support On-Chip low power mode [powerdown] via ZZ pin Interleaved or Linear Burst support via Mode pin Three Chip Enables for ease of depth expansion without Data Contention. Two Cycle load, Single Cycle Deselect Asynchronous Output Enable (OE\) Three Pin Burst Control (ADSP\, ADSC\, ADV\) 3.3V Core Power Supply 3.3V/2.5V IO Power Supply JEDEC Standard 100 pin TQFP Package, Available in Industrial, Enhanced, and Mil-Temperature Operating Ranges TQFP in copper lead frame* for superior thermal performance RoHs compliant options available *Consult factory for copper lead frame products A A CE1\ CE2 BWd\ BWc\ BWb\ BWa\ CE3\ VDD VSS CLK GW\ BWE\ OE\ ADSC\ ADSP\ ADV\ A A 98 97 96 95 92 91 89 87 84 99 94 93 90 88 86 85 83 Plastic Encapsulated Microcircuit DQPc DQc DQc VDDQ VSSQ DQc DQc DQc DQc VSSQ VDDQ DQc DQc NC VDD NC VSS DQd DQd VDDQ VSSQ DQd DQd DQd DQd VSSQ VDDQ DQd DQd DQPd 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 100 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 DQP DQb DQb VDD VSSQ DQb DQb DQb DQb VSSQ VDDQ DQb DQb VSS NC VDD ZZ DQa DQa V...