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HB52RD649DC-B

Elpida Memory

512MB Unbuffered SDRAM S.O.DIMM

DATA SHEET 512MB Unbuffered SDRAM S.O.DIMM HB52RF649DC-B (64M words × 72 bits, 2 bank) HB52RD649DC-B (64M words × 72 bi...



HB52RD649DC-B

Elpida Memory


Octopart Stock #: O-84345

Findchips Stock #: 84345-F

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Description
DATA SHEET 512MB Unbuffered SDRAM S.O.DIMM HB52RF649DC-B (64M words × 72 bits, 2 bank) HB52RD649DC-B (64M words × 72 bits, 2 bank) Description The HB52RF649DC, HB52RD649DC are a 64M × 72 × 2 banks Synchronous Dynamic RAM Small Outline Dual In-line Memory Module (S.O.DIMM), mounted 18 pieces of 256M bits SDRAM sealed in TCP package and 1 piece of serial EEPROM (2k bits) for Presence Detect (PD). An outline of the products is 144-pin Zig Zag Dual tabs socket type compact and thin package. Therefore, they make high density mounting possible without surface mount technology. They provide common data inputs and outputs. Decoupling capacitors are mounted beside TCP on the module board. Note: Do not push the cover or drop the modules in order to protect from mechanical defects, which would be electrical defects. Features Fully compatible with: JEDEC standard outline 8 bytes S.O.DIMM 144-pin Zig Zag Dual tabs socket type (dual lead out)  PCB height: 33.02mm (1.30inch)  Lead pitch: 0.80mm 3.3V power supply Clock frequency: 133MHz/100MHz (max.) LVTTL interface Data bus width: × 72 ECC Single pulsed /RAS 4 Banks can operates simultaneously and independently Burst read/write operation and burst read/single write operation capability Programmable burst length (BL): 1, 2, 4, 8 2 variations of burst sequence  Sequential  Interleave Programmable /CE latency (CL): 2, 3 Byte control by DQMB Refresh cycles: 8192 refresh cycles/64ms 2 variations of refresh  A...




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