Document
TPN1600ANH
MOSFETs Silicon N-channel MOS (U-MOS-H)
TPN1600ANH
1. Applications
• • • DC-DC Converters Switching Voltage Regulators Motor Drivers
2. Features
(1) (2) (3) (4) (5) (6) Small, thin package High-speed switching Small gate charge: QSW = 7.4 nC (typ.) Low drain-source on-resistance: RDS(ON) = 13 mΩ (typ.) (VGS = 10 V) Low leakage current: IDSS = 10 µA (max) (VDS = 100 V) Enhancement mode: Vth = 2.0 to 4.0 V (VDS = 10 V, ID = 0.2 mA)
3. Packaging and Internal Circuit
1, 2, 3: Source 4: Gate 5, 6, 7, 8: Drain
TSON Advance
4. Absolute Maximum Ratings (Note) (Ta = 25 unless otherwise specified)
Characteristics Drain-source voltage Gate-source voltage Drain current (DC) Drain current (DC) Drain current (pulsed) Power dissipation Power dissipation Power dissipation Single-pulse avalanche energy Avalanche current Channel temperature Storage temperature (Silicon limit) (Tc = 25 ) (t = 1 ms) (Tc = 25 ) (t = 10 s) (t = 10 s) (Note 3) (Note 4) (Note 5) (Note 1), (Note 2) (Note 1) (Note 1) Symbol VDSS VGSS ID ID IDP PD PD PD EAS IAR Tch Tstg Rating 100 ±20 36 17 80 42 1.9 0.7 96 17 150 -55 to 150 A W W W mJ A Unit V V A
Note:
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook ("Handling Precautions"/"Derating Concept and Methods") and individual reliability data (i.e. reliability test report and estimated failure rate, etc).
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5. Thermal Characteristics
Characteristics Channel-to-case thermal resistance Channel-to-ambient thermal resistance Channel-to-ambient thermal resistance (Tc = 25 ) (t = 10 s) (t = 10 s) (Note 3) (Note 4) Symbol Rth(ch-c) Rth(ch-a) Rth(ch-a) Max 2.97 65.7 178 Unit /W
Note 1: Ensure that the channel temperature does not exceed 150 . Note 2: Limited by silicon chip capability. Note 3: Device mounted on a glass-epoxy board (a), Figure 5.1 Note 4: Device mounted on a glass-epoxy board (b), Figure 5.2 Note 5: VDD = 60 V, Tch = 25 (initial), L = 0.36 mH, RG = 1.0 Ω, IAR = 17 A
Fig. 5.1 Device Mounted on a Glass-Epoxy Board (a)
Fig. 5.2 Device Mounted on a Glass-Epoxy Board (b)
Note:
This transistor is sensitive to electrostatic discharge and should be handled with care.
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6. Electrical Characteristics 6.1. Static Characteristics (Ta = 25 unless otherwise specified)
Characteristics Gate leakage current Drain cut-off current Drain-source breakdown voltage Gate threshold voltage Drain-source on-resistance Symbol IGSS IDSS V(BR)DSS V(BR)DSX Vth RDS(ON) Test Condition VGS = ±20 V, VDS = 0 V VDS = 100 V, VGS = 0 V ID = 10 mA, VGS = 0 V ID = 10 mA, VGS = -20 V VDS = 10 V, ID = 0.2 mA VGS = 10 V, ID = 8.5 A Min 100 65 2.0 Typ. 13 Max ±0.1 10 4.0 16 mΩ V Unit µA
6.2. Dynamic Characteristics (Ta = 25 unless otherwise specified)
Characteristics Input capacitance Reverse transfer capacitance Output capacitance Gate resistance Switching time (rise time) Switching time (turn-on time) Switching time (fall time) Switching time (turn-off time) Symbol Ciss Crss Coss rg tr ton tf toff See Fig. 6.2.1 Test Condition VDS = 50 V, VGS = 0 V, f = 1 MHz Min Typ. 1230 18 220 0.7 5.0 14 6.2 21 Max 1600 50 1.2 Unit pF pF pF Ω ns ns ns ns
Fig. 6.2.1 Switching Time Test Circuit
6.3. Gate Charge Characteristics (Ta = 25 unless otherwise specified)
Characteristics Total gate charge (gate-source plus gate-drain) Gate-source charge 1 Gate-drain charge Gate switch charge Symbol Qg Qgs1 Qgd QSW Test Condition VDD ≈ 50 V, VGS = 10 V, ID = 17 A Min Typ. 19 6.3 5.0 7.4 Max Unit nC
6.4. Source-Drain Characteristics (Ta = 25 unless otherwise specified)
Characteristics Reverse drain current (pulsed) Diode forward voltage (Note 6) Symbol IDRP VDSF IDR = 17 A, VGS = 0 V Test Condition Min Typ. Max 80 -1.2 Unit A V
Note 6: Ensure that the channel temperature does not exceed 150 .
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7. Marking
Fig. 7.1 Marking
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8. Characteristics Curves (Note)
Fig. 8.1 ID - VDS
Fig. 8.2 ID - VDS
Fig. 8.3 ID - VGS
Fig. 8.4 VDS - VGS
Fig. 8.5 RDS(ON) - ID
Fig. 8.6 RDS(ON) - Ta
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Fig. 8.7 IDR - VDS
Fig. 8.8 Capacitance - VDS
Fig. 8.9 Vth - Ta
Fig. 8.10 Dynamic Input/Output Characteristics
Fig. 8.11 PD - Ta (Guaranteed Maximum)
Fig. 8.12 PD - Tc (Guaranteed Maximum)
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Fig. 8.13 rth - tw (Guaranteed Maximum)
Fig. 8.14 Safe Operating Area (Guaranteed Maximum)
Note:
The above characteristics curves are presented for reference only and not guaranteed by prod.