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HCS21MS Dataheets PDF



Part Number HCS21MS
Manufacturers Intersil Corporation
Logo Intersil Corporation
Description Radiation Hardened Dual 4-Input AND Gate
Datasheet HCS21MS DatasheetHCS21MS Datasheet (PDF)

HCS21MS September 1995 Radiation Hardened Dual 4-Input AND Gate Pinouts 14 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE (SBDIP) MIL-STD-1835 CDIP2-T14, LEAD FINISH C TOP VIEW A1 1 B1 2 NC 3 C1 4 D1 5 Y1 6 GND 7 14 VCC 13 D2 12 C2 11 NC 10 B2 9 A2 8 Y2 Features • 3 Micron Radiation Hardened SOS CMOS • Total Dose 200K RAD (Si) • SEP Effective LET No Upsets: >100 MEV-cm2/mg • Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-Day (Typ) • Dose Rate Survivability: >1 x 1012 RAD (Si)/s • Dose R.

  HCS21MS   HCS21MS



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HCS21MS September 1995 Radiation Hardened Dual 4-Input AND Gate Pinouts 14 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE (SBDIP) MIL-STD-1835 CDIP2-T14, LEAD FINISH C TOP VIEW A1 1 B1 2 NC 3 C1 4 D1 5 Y1 6 GND 7 14 VCC 13 D2 12 C2 11 NC 10 B2 9 A2 8 Y2 Features • 3 Micron Radiation Hardened SOS CMOS • Total Dose 200K RAD (Si) • SEP Effective LET No Upsets: >100 MEV-cm2/mg • Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-Day (Typ) • Dose Rate Survivability: >1 x 1012 RAD (Si)/s • Dose Rate Upset >10 10 RAD (Si)/s 20ns Pulse • Latch-Up Free Under Any Conditions • Military Temperature Range: -55oC to +125oC • Significant Power Reduction Compared to LSTTL ICs • DC Operating Voltage Range: 4.5V to 5.5V • Input Logic Levels - VIL = 30% of VCC Max - VIH = 70% of VCC Min • Input Current Levels Ii ≤ 5µA at VOL, VOH 14 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE (FLATPACK) MIL-STD-1835 CDFP3-F14, LEAD FINISH C TOP VIEW A1 B1 NC 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCC D2 C2 NC B2 A2 Y2 Description The Intersil HCS21MS is a Radiation Hardened Dual Input AND Gate. A high on all inputs forces the output to a High state. The HCS21MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family. The HCS21MS is supplied in a 14 lead Ceramic flatpack (K suffix) or a SBDIP Package (D suffix). C1 D1 Y1 GND Functional Diagram An (1, 9) Ordering Information PART NUMBER HCS21DMSR TEMPERATURE RANGE -55oC to +125oC SCREENING LEVEL Intersil Class S Equivalent Intersil Class S Equivalent Sample PACKAGE Bn (2, 10) Yn (6, 8) Cn (4, 12) Dn (5, 13) 14 Lead SBDIP TRUTH TABLE HCS21KMSR -55oC to +125oC 14 Lead Ceramic Flatpack An 14 Lead SBDIP L X X L X X H INPUTS Bn Cn X X L X HX Dn X X X L H OUTPUTS Yn L L L L H HCS21D/ Sample HCS21K/ Sample HCS21HMSR +25oC +25oC Sample 14 Lead Ceramic Flatpack Die X X +25oC Die H NOTE: L = Logic Level Low, H = Logic level High, X = Don’t Care CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999 Spec Number File Number 53 518762 3052.1 Specifications HCS21MS Absolute Maximum Ratings Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VCC +0.5V DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA DC Drain Current, Any One Output . . . . . . . . . . . . . . . . . . . . . . .±25mA (All Voltage Reference to the VSS Terminal) Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC Lead Temperature (Soldering 10sec) . . . . . . . . . . . . . . . . . . +265oC Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1 Reliability Information Thermal Resistance θJA θJC SBDIP Package. . . . . . . . . . . . . . . . . . . . 74oC/W 24oC/W Ceramic Flatpack Package . . . . . . . . . . . 116oC/W 30oC/W Maximum Package Power Dissipation at +125oC Ambient SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.68W Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.43W If device power exceeds package dissipation capability, provide heat sinking or derate linearly at the following rate: SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.5mW/oC Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . 8.6mW/oC CAUTION: As with all semiconductors, stress listed under “Absolute Maximum Ratings” may be applied to devices (one at a time) without resulting in permanent damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The conditions listed under “Electrical Performance Characteristics” are the only conditions recommended for satisfactory device operation.. Operating Conditions Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V Input Rise and Fall Times at 4.5V VCC (TR, TF) . . . . . . .100ns Max Operating Temperature Range (TA) . . . . . . . . . . . . -55oC to +125oC Input Low Voltage (VIL). . . . . . . . . . . . . . . . . . . 0.0V to 30% of VCC Input High Voltage (VIH) . . . . . . . . . . . . . . . . . . 70% of VCC of VCC TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUPS 1 2, 3 Output Current (Sink) IOL VCC = 4.5V, VIH = 4.5V, VOUT = 0.4V, VIL = 0V 1 2, 3 Output Current (Source) IOH VCC = 4.5V, VIH = 4.5V, VOUT = VCC -0.4V, VIL = 0V VCC = 4.5V, VIH = 3.15V, IOL = 50µA, VIL = 1.35V VCC = 5.5V, VIH = 3.85V, IOL = 50µA, VIL = 1.65V Output Voltage High VOH VCC = 4.5V, VIH = 3.15V, IOH = -50µA, VIL = 1.35V VCC = 5.5V, VIH = 3.85V, IOH = -50µA, VIL = 1.65V Input Leakage Current IIN VCC = 5.5V, VIN = VCC or.


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