Document
PD -96172
IRFB4620PbF
HEXFET® Power MOSFET
Applications l High Efficiency Synchronous Rectification in SMPS l Uninterruptible Power Supply l High Speed Power Switching l Hard Switched and High Frequency Circuits Benefits l Improved Gate, Avalanche and Dynamic dV/dt Ruggedness l Fully Characterized Capacitance and Avalanche SOA l Enhanced body diode dV/dt and dI/dt Capability l Lead-Free
TO-220AB IRFB4620PbF
D
G S
VDSS RDS(on) typ. max. ID
200V 60m: 72.5m: 25A
G
D
S
Gate
Drain
Source
Absolute Maximum Ratings
Symbol
ID @ TC = 25°C ID @ TC = 100°C IDM PD @TC = 25°C VGS dv/dt TJ TSTG
Parameter
Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Maximum Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds (1.6mm from case) Mounting torque, 6-32 or M3 screw
Max.
25 18 100 144 0.96 ± 20 54 -55 to + 175 300 10lb in (1.1N m) 113 See Fig. 14, 15, 22a, 22b,
Units
A W W/°C V V/ns °C
c
e
x
x
Avalanche Characteristics
EAS (Thermally limited) IAR EAR Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy
c
d
f
mJ A mJ
Thermal Resistance
Symbol
RθJC RθCS RθJA Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient (PCB Mount)
j
Parameter
Typ.
Max.
1.045 62
Units
°C/W
ij
––– 0.50 –––
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1
09/05/08
IRFB4620PbF
Static @ TJ = 25°C (unless otherwise specified)
Symbol
V(BR)DSS ∆V(BR)DSS/∆TJ RDS(on) VGS(th) IDSS IGSS RG(int)
Parameter
Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Internal Gate Resistance
Min. Typ. Max. Units
200 ––– ––– 3.0 ––– ––– ––– –––
–––
Conditions
––– 0.23 60 ––– ––– ––– ––– ––– 2.6
––– V VGS = 0V, ID = 250µA ––– V/°C Reference to 25°C, ID = 5mA 72.5 mΩ VGS = 10V, ID = 15A 5.0 V VDS = VGS, ID = 100µA VDS = 200V, VGS = 0V 20 µA 250 VDS = 200V, VGS = 0V, TJ = 125°C 100 VGS = 20V nA VGS = -20V -100
f
–––
Ω
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol
gfs Qg Qgs Qgd Qsync td(on) tr td(off) tf Ciss Coss Crss Coss eff. (ER) Coss eff. (TR)
Parameter
Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Total Gate Charge Sync. (Qg - Qgd) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance
Min. Typ. Max. Units
37 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– 25 8.2 7.9 17 13.4 22.4 25.4 14.8 1710 125 30 113 317 ––– 38 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– S
Conditions
Effective Output Capacitance (Energy Related) Effective Output Capacitance (Time Related)
g
hÃ
VDS = 50V, ID = 15A ID = 15A VDS = 100V nC VGS = 10V ID = 15A, VDS =0V, VGS = 10V VDD = 130V ID = 15A ns RG = 7.3Ω VGS = 10V VGS = 0V VDS = 50V pF ƒ = 1.0MHz (See Fig.5) VGS = 0V, VDS = 0V to 160V (See Fig.11) VGS = 0V, VDS = 0V to 160V
f
f
h g
Diode Characteristics
Symbol
IS ISM VSD trr Qrr IRRM ton
Parameter
Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time
Min. Typ. Max. Units
––– ––– ––– ––– 25 A 100
Conditions
MOSFET symbol showing the integral reverse
G D
Ã
Reverse Recovery Charge Reverse Recovery Current Forward Turn-On Time
––– ––– 1.3 V ––– 78 ––– ns ––– 99 ––– ––– 294 ––– nC TJ = 125°C ––– 432 ––– ––– 7.6 ––– A TJ = 25°C Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
p-n junction diode. TJ = 25°C, IS = 15A, VGS = 0V TJ = 25°C VR = 100V, TJ = 125°C IF = 15A di/dt = 100A/µs TJ = 25°C
f
S
f
Notes: Repetitive rating; pulse width limited by max. junction temperature. Limited by TJmax, starting TJ = 25°C, L = 1.0mH RG = 25 Ω, IAS = 15A, VGS =10V. Part not recommended for use above this value . ISD ≤ 15A, di/dt ≤ 634A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C. Pulse width ≤ 400µs; duty cycle ≤ 2%.
Coss eff. (TR) is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS .
Coss eff. (ER) is a fixed capacitance that gives the same energy as When mounted on 1" square PCB (FR-4 or G-10 Material). For recom Rθ is measured at TJ approximately 90°C
Coss while VDS is rising from 0 to 80% VDSS. mended footprint and soldering techniques refer to application note #AN-994.
2
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IRFB4620PbF
1000
TOP VGS 15V 12V 10V 8.0V 7.0V 6.0V 5.5V 5.0V
1000
TOP VGS 15V 12V 10V 8.0V 7.0V 6.0V 5.5V 5.0V
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
100
100
BOTTOM
10
BOTTOM
10
5.0V
1 5.0V 0.1 ≤60µs PULSE WIDTH Tj = 25°C 0.01 0.1 1 10 100 V DS, Drain-to-Source Voltage (V)
1
≤60µs PULSE WIDTH
Tj = 175°C 0.1 0.1 1 10 100 V DS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
1000
RDS(on) , Drain-to-S.