HD74LV174A

HD74LV174A Hex D-type Flip-Flops with Clear ADE-205-269 (Z) 1st Edition April 1999 Description This device contains 6 master-slave flip-flops with a common clock and common clear. Data on the D input having the specified setup and hold times is transferred to the Q output on the low to high transition of the clock input. The clear input when low, sets all outputs to a low state. Low-voltage and high-speed operation is suitable for battery-powered products (e.g., notebook computers), and the low-power consumption extends the battery life. Features VCC = 2.0 V to 5.5 V operation All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V) All outputs VO (Max.) = 5.5 V (@VCC = 0 V) Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C) Typical VOH undershoot > 2.3 V (@VCC = 3.3 V, Ta = 25°C) Output current ±6 mA (@VCC = 3.0 V to 3.6 V), ±12 mA (@VCC = 4.5 V to 5.5 V) Function Table Inputs CLR L H H H Note: H: L: X: ↑: ↓: CLK X ↑ ↑ ↓ High level Low level Immaterial Low to high transition High to low transition D X H L X Output Q L H L no change HD74LV174A Pin Arrangement CLR 1 1Q 2 1D 3 2D 4 2Q 5 3D 6 3Q 7 GND 8 16 VCC 15 6Q 14 6D 13 5D 12 5Q 11 4D 10 4Q 9 CLK (Top view) 2 HD74LV174A Absolute Maximum Ratings Item Supply voltage range Input voltage range* 1 1, 2 Symbol VCC VI VO Ratings –0.5 to 7.0 –0.5 to 7.0 –0.5 to VCC + 0.5 –0.5 to 7.0 Unit V V V Conditions Output voltage range* Output: H or L VCC: OFF Input clamp current Output clamp current Continuous...