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HD74LV161A

Hitachi Semiconductor

Synchronous 4-bit Binary Counter (Direct Clear)

HD74LV161A Synchronous 4-bit Binary Counter (Direct Clear) ADE-205-264A (Z) 2nd Edition June 1999 Description The HD74L...


Hitachi Semiconductor

HD74LV161A

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HD74LV161A Synchronous 4-bit Binary Counter (Direct Clear) ADE-205-264A (Z) 2nd Edition June 1999 Description The HD74LV161A is 4-bit binary counters. All flip flops are clocked simultaneously on the low to high to transition (positive edge) of the clock input waveform. These counters may be preset using the load input. Presetting of all four flip flops is synchronous to the rising edge of clock. When load is held low counting is disabled and tha data on the A, B, C and D inputs is loaded into the counter on the rising edge clock. If the load input is taken high before the positive edge of clock the count operation will be unaffected. Low-voltage and high-speed operation is suitable for the battery-powered products (e.g., notebook computers), and the low-power consumption extends the battery life. Features VCC = 2.0 V to 5.5 V operation All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V) All outputs VO (Max.) = 5.5 V (@VCC = 0 V) Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C) Typical VOH undershoot > 2.3 V (@VCC = 3.3 V, Ta = 25°C) Output current ±6 mA (@VCC = 3.0 V to 3.6 V), ±12 mA (@VCC = 4.5 V to 5.5 V) HD74LV161A Function Table Inputs CLR L H H H H H LOAD X L H H H X ENP X X X L H X ENT X X L X H X CLK X ↑ ↑ ↑ ↑ ↓ Outputs QA L A No change No change Count up No change QB L B QC L C QD L D Note: H: High level L: Low level X: Immaterial ↑: Low to high transition ↓: High to low transition A, B, C, D: Data input Carry = ENT QA QB QC QD Pi...




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