HD74HC93

HD74HC93 4-bit Binary Counter Description The HD74HC93 is a 4-bit ripple type counter consisting of four master/slave flip-flops that are internally connected to provide separate divide-by-two and divide-by-eight sections. Each section has a separate clock input which initiates state changes of the counter on the high-to-low clock transition. State changes of the Q outputs do not occur simultaneously because of internal ripple delays. Therefore, decoded output signals are subject to decoding spikes and should not be used as clocks or as strobes except when gated with the clock of the HD74HC93. QA is the output of the divide-by-two section; Q B, QC, and QD are the binary outputs of the divide-by-eight section. A gated AND asynchronous reset is provided which resets all the flip-flops. Because the output from the divide-by-two section is not internally connected to the succeeding stages, the devices may be operated in various counting modes: 1. A 4-bit rippl counter – The QA output must be externally connected to the clock B input. The input count pulses are applied to the clock A inputl. Simultaneous divisions of 2, 4, 8 and 16 are performed at the QA, QB, QC and QD outputs. 2. A 3-bit ripple counter – The input count pulses are applied to the clock B input. Simultaneous frequency divisions of 2, 4 and 8 are available at the QB, QC and QD outputs. Independent use of the first flip-flop is available if the reset function coincides with reset of the 3-bit ripple-through counter...