HD74HC680

HD74HC680 12-bit Address Comparator Description The HD74HC680 address comparator simplifies addressing of memory boards and/or other peripheral devices. The four P inputs are normally hard wired with a preprogrammed address. An internal decoder determines what input information applied to the 12 A inputs must be low or high to cause a low state at the output (Y). For example, a positive-logic bit combination of 0111 (decimal 7) at the P input determines that inputs A1 through A7 must be low and that inputs A8 through A12 must be high to cause the output to go low. Equality of the address applied at the A inputs to the preprogrammed address is indicated by the output being low. The HD74HC680 features a transparent latch and a latch enable input (C). When C is high, the device is in the transparent mode. When C is low, the previous logical state of Y is latched. Features High Speed Operation High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) HD74HC680 Function Table Inputs C H H H H H H H H H H H H H H H H H L P3 L L L L L L L L H H H H H H H H P2 L L L L H H H H L L L L H H H H P1 L L H H L L H H L L H H L L H H P0 L H L H L H L H L H L H L H L H A1 H L L L L L L L L L L L L X X L A2 H H L L L L L L L L L L L X X L A3 H H H L L L L L L L L L L X X L A4 H H H H L L L L L L L L L X X L A5 H H H H H L L L L L L L L X X L A6 H H H H H H L L L...