Dual J-K Flip-Flops
HD74HC109
Dual J-K Flip-Flops (with Preset and Clear)
Description
Each flip-flop has independent J, K , preset, clear a...
Description
HD74HC109
Dual J-K Flip-Flops (with Preset and Clear)
Description
Each flip-flop has independent J, K , preset, clear and clock inputs and Q and Q outputs. This device is edge sensitive to the clock input and changes state on the positive going transition of the clock pulse. Clear and preset are independent of the clock and accomplished by a low logic level on the corresponding input.
Features
High Speed Operation: tpd (Clock to Q) = 15 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 2 µA max (Ta = 25°C)
Function Table
Inputs Preset L H L H H H H H Note: Clear H L L H H H H H L Clock X X X J X X X L H L H X K X X X L L H H X Output Q H L H* L Toggle Q0 H Q0 Q0 L Q0
1
Q L H H*1 H
1. Q and Q will remain high as long as preset and clear input are low, but Q and Q are unpredictable if preset and clear input go high simultaneously.
HD74HC109
Pin Arrangement
1CLR 1J 1K 1CK 1PR 1Q 1Q GND
1 2 3 4 5 6 7 8 (Top view) K CK J CLR PR Q Q J CK K PR CLR Q Q
16 15 14 13 12 11 10 9
VCC 2CLR 2J 2K 2CK 2PR 2Q 2Q
Block Diagram (1/2)
PR CLR C C J K C C C C Q Q
C CK C C
C
2
HD74HC109
DC Characteristics
Ta = 25°C Item Input voltage Symbol VIH Ta = –40 to +85°C Max — — — 0.5 1.35 1.8 — — — — — 0.1 0.1 0.1 0.33 0.33 ±1.0 20 µA µA I OL = 4 mA I OL = 5.2 mA Vin = VCC or GND Vin = VCC or GND, Iout = 0 µA V I OH = –4 mA I OH = –5.2 mA Vin = VIH or VIL ...
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