HD74AC175

HD74AC175 Quad D-Type Flip-Flop Description The HD74AC175 is a high-speed quad D flip-flop. The device is useful for general flip-flop requirements where clock and clear inputs are common. The information on the D inputs is stored during the Low-toHigh clock transition. Both true and complemented outputs of each flip-flop are provided. A Master Reset input resets all flip-flops, independent of the Clock or D inputs, when Low. Features Edge-Triggered D-Type Inputs Buffered Positive Edge-Triggered Clock Asynchronous Common Reset True and Complement Output Outputs Source/Sink 24 mA HD74AC175 Pin Arrangement MR 1 Q0 2 Q0 3 D0 4 D1 5 Q1 6 Q1 7 GND 8 (Top view) 16 VCC 15 Q3 14 Q3 13 D3 12 D2 11 Q2 10 Q2 9 CP Logic Symbol D0 CP D1 D2 D3 MR Q0 Q0 Q1 Q1 Q2 Q2 Q3 Q3 Pin Names D0 to D3 CP MR Q0 to Q3 Q0 to Q 3 Data Inputs Clock Pulse Input Master Reset Input True Outputs Complement Outputs 2 HD74AC175 Functional Description The HD74AC175 consists of four edge-triggered D flip-flops with individual D inputs and Q and Q outputs. The Clock and Master Reset are common. The four flip-flops will store the state of their individual D inputs on the Low-to-High clock (CP) transition, causing individual Q and Q outputs to follow. A Low input on the Master Reset ( MR ) will force all Q outputs Low and Q outputs High independent of Clock or Data inputs. The HD74AC175 is useful for general logic applications where a common Master Reset and Clock are acceptable. Truth Table I...