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AD9142

Part Number	AD9142
Manufacturer	Analog Devices
Description	Digital-to-Analog Converter
Published	May 18, 2014
Detailed Description	Data Sheet FEATURES Very small inherent latency variation: <2 DAC clock cycles Proprietary low spurious and distortion d...
Datasheet	AD9142 PDF File

Overview

Data Sheet FEATURES Very small inherent latency variation: <2 DAC clock cycles Proprietary low spurious and distortion design 6-carrier GSM ACLR = 79 dBc at 200 MHz IF SFDR > 85 dBc (bandwidth = 300 MHz) at ZIF Flexible 16-bit LVDS interface Supports word and byte load Multiple chip synchronization Fixed latency and data generator latency compensation Selectable 2×, 4×, 8× interpolation filter Low power architecture fS/4 power saving coarse mixer Input signal power detection Emergency stop for downstream analog circuitry protection FIFO error detection On-chip numeric control oscillator allows carrier placement anywhere in the DAC Nyquist bandwidth Transmit enable function for extra power sa...

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