IGLOO PLUS Low Power Flash FPGAs
DS0102 Revision 17
IGLOO PLUS Low Power Flash FPGAs
with Flash*Freeze Technology
Features and Benefits
Low Power
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Description
DS0102 Revision 17
IGLOO PLUS Low Power Flash FPGAs
with Flash*Freeze Technology
Features and Benefits
Low Power
1.2 V to 1.5 V Core Voltage Support for Low Power
Supports Single-Voltage System Operation
5 µW Power Consumption in Flash*Freeze Mode
Low Power Active FPGA Operation
Flash*Freeze Technology Enables Ultra-Low Power
Consumption while Maintaining FPGA Content
Configurable Hold Previous State, Tristate, HIGH, or LOW State
per I/O in Flash*Freeze Mode
Easy Entry To / Exit From Ultra-Low Power Flash*Freeze Mode
Feature Rich
30 k to 125 k System Gates
Up to 36 kbits of True Dual-Port SRAM
Up to 212 User I/Os
Reprogrammable Flash Technology
130-nm, 7-Layer Metal, Flash-Based CMOS Process
Instant On Level 0 Support
Single-Chip Solution
Retains Programmed Design When Powered Off
250 MHz (1.5 V systems) and 160 MHz (1.2 V systems) System
Performance
In-System Programming (ISP) and Security
ISP Using On-Chip (AES) Decryption via
J1T2A8G-B(iItEEAEdv1a5n3c2e–dcoEmnpclriyapntti)o†n
Standard
FlashLock® Designed to Secure FPGA Contents
High-Performance Routing Hierarchy
Segmented, Hierarchical Routing and Clock Structure
Advanced I/O
1.2 V, 1.5 V, 1.8 V, 2.5 V, and 3.3 V Mixed-Voltage Operation BIGaLnOk-OS®elePcLtUabSleDeIv/OicesVoltages—4 Banks per Chip on All Single-Ended I/O Standards: LVTTL, LVCMOS
3.3 V / 2.5 V / 1.8 V / 1.5 V / 1.2 V Selectable Schmitt Trigger Inputs Wide Range Power Supply Voltage...
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