DatasheetsPDF.com

MX29GL512E Dataheets PDF



Part Number MX29GL512E
Manufacturers MCNIX
Logo MCNIX
Description SINGLE VOLTAGE 3V ONLY FLASH MEMORY
Datasheet MX29GL512E DatasheetMX29GL512E Datasheet (PDF)

MX29GL512E H/L MX29GL512E H/L DATASHEET The MX29GL512E product family is not recommended for new designs. The MX29GL512F family is the recommended replacement. Please refer to MX29GL512F datasheet for full specifications and ordering information, or contact your local sales representative for additional support. P/N:PM1524 REV. 1.5, NOV. 13, 2013 http://www.Datasheet4U.com 1 MX29GL512E H/L SINGLE VOLTAGE 3V ONLY FLASH MEMORY The MX29GL512E product family is not recommended for ne.

  MX29GL512E   MX29GL512E


Document
MX29GL512E H/L MX29GL512E H/L DATASHEET The MX29GL512E product family is not recommended for new designs. The MX29GL512F family is the recommended replacement. Please refer to MX29GL512F datasheet for full specifications and ordering information, or contact your local sales representative for additional support. P/N:PM1524 REV. 1.5, NOV. 13, 2013 http://www.Datasheet4U.com 1 MX29GL512E H/L SINGLE VOLTAGE 3V ONLY FLASH MEMORY The MX29GL512E product family is not recommended for new designs. The MX29GL512F family is the recommended replacement. Please refer to MX29GL512F datasheet for full specifications and ordering information, or contact your local sales representative for additional support. FEATURES GENERAL FEATURES • 2.7 to 3.6 volt for read, erase, and program operations • Byte/Word mode switchable - 67,108,864 x 8 / 33,554,432 x 16 • 64KW/128KB uniform sector architecture - 512 equal sectors • 16-byte/8-word page read buffer • 64-byte/32-word write buffer • Extra 128-word sector for security - Features factory locked and identifiable, and customer lockable • Advanced sector protection function (Solid and Password Protect) • Compatible with JEDEC standard - Pinout and software compatible to single power supply Flash PERFORMANCE • High Performance - Fast access time: 110ns (VCC=2.7~3.6V), 100ns (VCC=3.0~3.6V) - Page access time: 25ns - Fast program time: 10us/word - Fast erase time: 0.5s/sector • Low Power Consumption - Low active read current: 10mA (typical) at 5MHz - Low standby current: 40uA (typical) • Typical 100,000 erase/program cycle • 20 years data retention SOFTWARE FEATURES • Program/Erase Suspend & Program/Erase Resume • Status Reply - Data# Polling & Toggle bits provide detection of program and erase operation completion • Support Common Flash Interface (CFI) HARDWARE FEATURES • Ready/Busy# (RY/BY#) Output - Provides a hardware method of detecting program and erase operation completion • Hardware Reset (RESET#) Input - Provides a hardware method to reset the internal state machine to read mode • WP#/ACC input pin - Hardware write protect pin/Provides accelerated program capability PACKAGE • 56-Pin TSOP • 64-Ball LFBGA (11mm x 13mm) • 70-Pin SSOP • All devices are RoHS Compliant and Halogen-free P/N:PM1524 REV. 1.5, NOV. 13, 2013 2 PIN CONFIGURATION 56 TSOP A23 A22 A15 A14 A13 A12 A11 A10 A9 A8 A19 A20 WE# RESET# A21 WP#/ACC RY/BY# A18 A17 A7 A6 A5 A4 A3 A2 A1 NC NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 MX29GL512E H/L 56 A24 55 NC 54 A16 53 BYTE# 52 GND 51 Q15/A-1 50 Q7 49 Q14 48 Q6 47 Q13 46 Q5 45 Q12 44 Q4 43 VCC 42 Q11 41 Q3 40 Q10 39 Q2 38 Q9 37 Q1 36 Q8 35 Q0 34 OE# 33 GND 32 CE# 31 A0 30 NC 29 VI/O 64 LFBGA P/N:PM1524 8 NC A22 A23 VIO GND A24 NC NC 7 A13 A12 A14 A15 A16 BYTE# Q15/ A-1 GND 6 A9 A8 A10 A11 Q7 Q14 Q13 Q6 5 WE# RES- A21 A19 Q5 Q12 VCC Q4 ET# 4 RY/ WP#/ A18 A20 BY# ACC Q2 Q10 Q11 Q3 3 A7 A17 A6 A5 Q0 Q8 Q9 Q1 2 A3 A4 A2 A1 A0 CE# OE# GND 1 NC NC NC NC NC VIO NC NC AB CD E F G H REV. 1.5, NOV. 13, 2013 3 MX29GL512E H/L 70 SSOP A20 A21 A18 A17 OE# A6 A5 A4 A3 A2 A1 A0 BYTE# GND NC* NC* NC NC* NC NC GND NC CE# GND NC A7 Q0 Q8 Q1 Q9 Q2 Q10 Q3 Q11 NC 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 70 A19 69 A8 68 A15 67 A10 66 A11 65 A12 64 A13 63 A14 62 A9 61 A16 60 WE# 59 A24 58 A22 57 A23 56 GND 55 NC* 54 NC* 53 WP#/ACC 52 NC 51 NC 50 NC 49 GND 48 RESET# 47 GND 46 GND 45 Q15/A-1 44 Q7 43 Q14 42 Q6 41 Q13 40 Q5 39 Q12 38 Q4 37 VCC Note: "*" Do not connect to Vih or Vcc 36 VCC PIN DESCRIPTION SYMBOL PIN NAME A0~A24 Q0~Q14 Q15/A-1 CE# WE# OE# RESET# Address Input Data Inputs/Outputs Q15(Word Mode)/LSB addr(Byte Mode) Chip Enable Input Write Enable Input Output Enable Input Hardware Reset Pin, Active Low WP#/ACC* Hardware Write Protect/Programming Acceleration input RY/BY# Ready/Busy Output BYTE# Selects 8 bits or 16 bits mode VCC +3.0V single power supply GND Device Ground NC Not Connected VI/O Power Supply for Input/Output Notes: 1. WP#/ACC has internal pull up. 2. VI/O voltage must tight with VCC. VI/O = VCC =2.7V~3.6V. LOGIC SYMBOL 25 A0-A24 CE# OE# WE# RESET# WP#/ACC BYTE# VI/O Q0-Q15 (A-1) 16 or 8 RY/BY# P/N:PM1524 REV. 1.5, NOV. 13, 2013 4 BLOCK DIAGRAM MX29GL512E H/L CE# OE# WE# RESET# BYTE# WP#/ACC CONTROL INPUT LOGIC PROGRAM/ERASE HIGH VOLTAGE WRITE STATE MACHINE (WSM) X-DECODER Y-DECODER A0-AM ADDRESS LATCH AND BUFFER Q0-Q15/A-1 FLASH ARRAY Y-PASS GATE ARRAY SOURCE HV SENSE AMPLIFIER PGM DATA HV PROGRAM DATA LATCH STATE REGISTER COMMAND DATA DECODER COMMAND DATA LATCH I/O BUFFER AM: MSB address P/N:PM1524 REV. 1.5, NOV. 13, 2013 5 MX29GL512E H/L BLOCK DIAGRAM DESCRIPTION The block diagram on Page 5 illustrates a simplified architecture of this device. Each block in the block diagram represent.


MX29GL512F MX29GL512E MX29GL512EH


@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site.
(Privacy Policy & Contact)