4-bit synchronous binary counter
INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
• The IC04 LOCMOS HE4000B Logic Family S...
Description
INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC
The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC
HEF40161B MSI 4-bit synchronous binary counter with asynchronous reset
Product specification File under Integrated Circuits, IC04
January 1995
Philips Semiconductors
4-bit synchronous binary counter with asynchronous reset
Product specification
HEF40161B MSI
DESCRIPTION
The HEF40161B is a fully synchronous edge-triggered 4-bit binary counter with a clock input (CP), an overriding asynchronous master reset (MR), four parallel data inputs (P0 to P3), three synchronous mode control inputs (parallel enable (PE), count enable parallel (CEP) and count enable trickle (CET)), buffered outputs from all four bit positions (O0 to O3) and a terminal count output (TC).
Operation is fully synchronous (except for the MR input) and occurs on the LOW to HIGH transition of CP. When ...
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