HEF4000B

INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC HEF4000B gates Dual 3-input NOR gate and inverter Product specification File under Integrated Circuits, IC04 January 1995 Philips Semiconductors Product specification Dual 3-input NOR gate and inverter DESCRIPTION The HEF4000B provides the positive dual 3-input NOR function. A single stage inverting function with standard output performance is also accomplished. The outputs are fully buffered for highest noise immunity and pattern insensitivity of output impedance. HEF4000B gates Fig.2 Pinning diagram. HEF4000BP(N): HEF4000BD(F): HEF4000BT(D): 14-lead DIL; plastic (SOT27-1) 14-lead DIL; ceramic (cerdip) (SOT73) 14-lead SO; plastic (SOT108-1) Fig.1 Functional diagram. ( ): Package Designator North America FAMILY DATA, IDD LIMITS category GATES See Family Specifications Fig.3 Logic diagram. January 1995 2 Philips Semiconductors Product specification Dual 3-input NOR gate and inverter DC CHARACTERISTICS For the single inverter stage (I7/O3): see Family Specifications for input voltages HIGH and LOW (unbuffered stages only). AC CHARACTERISTICS VSS = 0 V; Tamb = 25 °C; CL = 50 pF; input transition times ≤ 20 ns VDD V Propagation delays I1 to I6 → O1,O2 5 10 15 5 I7 → O3 (unbuffered output) Output transition times HIGH to LOW 10 15 5 10 15 5 LOW to HIGH 10 15...