EV10AQ190

EV10AQ190 EV10AQ190 Low power QUAD 10-bit 1.25 Gsps ADC operating up to 5 Gsps Datasheet - Preliminary Main Features ƒ Quad ADC with 10-bit resolution using true e2v single core technology − 1.25 Gsps Sampling Rate in 4-channel mode − 2.5 Gsps Sampling Rate in 2-channel mode − 5 Gsps Sampling Rate in 1-channel mode − Built-in four-by-four Cross Point Switch ƒ Single 2.5 GHz Differential Symmetrical Input Clock ƒ 500 mVpp Analog Input (Differential AC or DC Coupled) ƒ ADC Master Reset (LVDS) ƒ Double Data Rate Output Protocol ƒ LVDS Output format ƒ Digital Interface (SPI) with Reset Signal: − Channel Mode Selection − Selectable bandwidth (2 available settings) − Gain, Offset, Phase Control − Standby Mode (full or partial) − Binary or Gray Coding Selection − Test Modes (ramp, flashing “1”) ƒ ƒ ƒ ƒ Power Supplies: single 3.3V (1.8V Outputs) Reduced clock induced transients on power supply pins due to BiCMOS Silicon technology Power Dissipation: 1.4W per channel EBGA380 Package (RoHS, 1.27 mm Pitch) Performance ƒ Selectable Full Power Input Bandwidth (-3 dB) up to 3 GHz (4-2-1 channel mode) ƒ Band flatness: ± 0.5 dB from DC to 30% of full Power Input bandwidth ƒ Channel-To-Channel Isolation: > 60 dB ƒ 4-channel mode (Fsampling = 1.25 Gsps, -1 dBFS) − ENOB = 8.8 bit, SFDR = 65 dBc, SNR = 56 dB, DNL = ±0.3 LSB, INL = ±1.5 LSB (Fin= 100 MHz) − ENOB = 8.5 bit, SFDR = 63 dBc, SNR = 54 dB (Fin= 620 MHz) − ENOB = 7.8 bit, SFDR = 57 dBc, SNR = 50 dB (Fin= 1.2 GHz) ƒ 2-channel mode or ...