512Kx8 Bit High Speed Static RAM
PRELIMINARY
KM684002A, KM684002AE, KM684002AI
Document Title
512Kx8 Bit High Speed Static RAM(5V Operating), Revolutiona...
Description
PRELIMINARY
KM684002A, KM684002AE, KM684002AI
Document Title
512Kx8 Bit High Speed Static RAM(5V Operating), Revolutionary Pin out. Operated at Commercial Temperature Range.
CMOS SRAM
Revision History
Rev No. Rev. 0.0 Rev. 0.5 History Initial release with Design Target. Release to Preliminary Data Sheet. 0.1. Replace Design Target to Preliminary. 0.2. Delete 12ns part but add 17ns part. 0.3. Relax D.C and A.C parameters and insert new parameter(Icc1) with the test condition. 0.3.1. Insert Icc1 parameter with the test condition as address is increased with binary count. 0.3.2. Relax D.C and A.C parameters. Previous spec. Relaxed spec. Items (15/ - /20ns part) (15/17/20ns part) Icc 190/ - /180mA 220/215/210mA tCW 10/ - /12ns 12/13/14ns tAW 10/ - /12ns 12/13/14ns tWP(OE=H) 10/ - /12ns 12/13/14ns tWP1(OE=L) 12/ - /14ns 15/17/20ns tDW 7/ - /9ns 8/9/10ns Release to Final Data Sheet. 1.1. Delete Preliminary. 1.2. Delete Icc1 parameter with the test condition. 1.3. Update D.C parameters. Previous spec. Updated spec. Items (15/17/20ns part) (15/17/20ns part) Icc 220/215/210mA 170/165/160mA 1.4. Add the test condition for VOH1 with Vcc=5V±5% at 25°C 1.5. Add timing diagram to define tWP as ″(Timing Wave Form of Write Cycle(CS=Low fixed)″ 2.1 Add extended and industrial temperature range parts. Draft Data Jun. 14th, 1996 Sep. 16th, 1996 Remark Design Target Preliminary
Rev. 1.0
Jun. 5th, 1997
Final
Rev. 2.0
Jun. 5th, 1997
Final
The attached data sheets are prepared and approved...
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