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P-Channel Enhancement Mode Field Effect Transistor FEATURES
-30V, -33A, RDS(ON) = 18mΩ @VGS = -10V. RDS(ON) = 30mΩ @VGS = -4.5V. Super high dense cell design for extremely low RDS(ON). High power and current handing capability. Lead free product is acquired. TO-251 & TO-252 package.
CED4311/CEU4311
D
D G S CEU SERIES TO-252(D-PAK)
G D
G
S CED SERIES TO-251(I-PAK)
S
ABSOLUTE MAXIMUM RATINGS
Parameter Drain-Source Voltage Gate-Source Voltage Drain Current-Continuous Drain Current-Pulsed
a
Tc = 25 C unless otherwise noted Symbol Limit VDS VGS ID IDM PD TJ,Tstg -30
Units V V A A W W/ C C
±20
-33 -100 36 0.29 -55 to 150
Maximum Power Dissipation @ TC = 25 C - Derate above 25 C Operating and Store Temperature Range
Thermal Characteristics
Parameter Thermal Resistance, Junction-to-Case Thermal Resistance, Junction-to-Ambient Symbol RθJC RθJA Limit 3.5 50 Units C/W C/W
Specification and data are subject to change without notice . 1
Rev 2. 2010.July http://www.cetsemi.com
Free Datasheet http://www.datasheet-pdf.com/
CED4311/CEU4311
Electrical Characteristics
Parameter Off Characteristics Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current Gate Body Leakage Current, Forward Gate Body Leakage Current, Reverse On Characteristics c Gate Threshold Voltage Static Drain-Source On-Resistance Dynamic Characteristics d Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Switching Characteristics d Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Drain-Source Diode Forward Current b Drain-Source Diode Forward Voltage c td(on) tr td(off) tf Qg Qgs Qgd IS VSD VGS = 0V, IS = -3.2A VDS = -15V, ID = -7A, VGS = -4.5V VDD = -10V, ID = -1A, VGS = -10V, RGEN = 6Ω 15 9 60 20 19 5 7 -3.2 -1.2 30 18 120 40 25 ns ns ns ns nC nC nC A V gFS Ciss Coss Crss VDS = -5V, ID = -11A VDS = -15V, VGS = 0V, f = 1.0 MHz 21 1690 285 210 S pF pF pF VGS(th) RDS(on) VGS = VDS, ID = -250µA VGS = -10V, ID = -10A VGS = -4.5V, ID = -9A -1 14 23 -3 18 30 V mΩ mΩ BVDSS IDSS IGSSF IGSSR VGS = 0V, ID = -250µA VDS = -30V, VGS = 0V VGS = 20V, VDS = 0V VGS = -20V, VDS = 0V -30 -1 100 -100 V
µA
TA = 25 C unless otherwise noted Symbol Test Condition Min Typ Max Units
nA nA
Drain-Source Diode Characteristics and Maximun Ratings
Notes : a.Repetitive Rating : Pulse width limited by maximum junction temperature. b.Surface Mounted on FR4 Board, t < 10 sec. c.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2%. d.Guaranteed by design, not subject to production testing.
2
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CED4311/CEU4311
50 50
-ID, Drain Current (A)
30 20 10 0 0.0
-ID, Drain Current (A)
40
-VGS=10,8,7,6,5V
40 30 20 25 C 10 0 TJ=125 C 0 1 2 3 4 -55 C 5 6
-VGS=4V
-VGS=3V
0.5
1.0
1.5
2.0
2.5
3.0
-VDS, Drain-to-Source Voltage (V) Figure 1. Output Characteristics
2400 2000 1600 1200 800 400 0 Crss 0 5 10 15 Coss 20 25 Ciss 2.2 1.9 1.6 1.3 1.0 0.7 0.4 -100
-VGS, Gate-to-Source Voltage (V) Figure 2. Transfer Characteristics
ID=-10A VGS=-10V
RDS(ON), Normalized RDS(ON), On-Resistance(Ohms)
C, Capacitance (pF)
-50
0
50
100
150
200
-VDS, Drain-to-Source Voltage (V) Figure 3. Capacitance
1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 -50 VDS=VGS
TJ, Junction Temperature( C) Figure 4. On-Resistance Variation with Temperature -IS, Source-drain current (A)
VGS=0V
10
2
VTH, Normalized Gate-Source Threshold Voltage
ID=-250µA
10
1
-25
0
25
50
75
100
125
150
10
0
0.4
0.6
0.8
1.0
1.2
1.4
TJ, Junction Temperature( C) Figure 5. Gate Threshold Variation with Temperature
-VSD, Body Diode Forward Voltage (V) Figure 6. Body Diode Forward Voltage Variation with Source Current
3
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CED4311/CEU4311
-VGS, Gate to Source Voltage (V)
5 4 3 2 1 0 VDS=-15V ID=-7A 10
3
-ID, Drain Current (A)
10
2
RDS(ON)Limit
100ms 1ms 10ms DC
10
1
10
0
0
4
8
12
16
20
24
10
-1
TC=25 C TJ=150 C Single Pulse 10
-2
10
-1
10
0
10
1
10
2
Qg, Total Gate Charge (nC) Figure 7. Gate Charge VDD t on V IN VGS RGEN G RL D VOUT td(on) VOUT
-VDS, Drain-Source Voltage (V) Figure 8. Maximum Safe Operating Area
toff tr
90%
td(off)
90% 10%
tf
10%
INVERTED
90%
S
VIN
50% 10%
50%
PULSE WIDTH
Figure 9. Switching Test Circuit
Figure 10. Switching Waveforms
r(t),Normalized Effective Transient Thermal Impedance
10
0
D=0.5 0.2
10
-1
0.1 0.05 0.02 0.01 Single Pulse
PDM t1 t2
10
-2
1. R£cJC (t)=r (t) * R£cJC 2. R£cJC=See Datasheet 3. TJM-TC = P* R£cJC (t) 4. Duty Cycle, D=t1/t2
10
-2
10
-1
10
0
10
1
10
2
10
3
10
4
Square Wave Pulse Duration (msec) Figure 11. Normalized Thermal Transient Impedance Curve 4
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