TC58NVG3D2ETA00

TOSHIBA CONFIDENTIAL TENTATIVE TC58NVG3D2ETA00 TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 2 8 GBIT (1G × 8 BIT) CMOS NAND E PROM (Multi-Level-Cell) DESCRIPTION The TC58NVG3D2 is a single 3.3 V 8 Gbit (8,984,199,168 bits) NAND Electrically Erasable and Programmable Read-Only Memory (NAND E2PROM) organized as (8192 + 376) bytes × 128 pages × 1028 blocks. The device has two 8568-byte static registers which allow program and read data to be transferred between the register and the memory cell array in 8568-byte increments. The Erase operation is implemented in a single block unit (1 Mbytes + 47 Kbytes: 8568 bytes × 128 pages). The TC58NVG3D2 is a serial-type memory device which utilizes the I/O pins for both address and data input/output as well as for command inputs. The Erase and Program operations are automatically executed making the device most suitable for applications such as solid-state file storage, voice recording, image file memory for still cameras and other systems which require high-density non-volatile memory data storage. FEATURES Organization Memory cell array Register Page size Block size TC58NVG3D2E 8568 × 128.5K × 8 8568 × 8 8568 bytes (1M + 47 K) bytes Modes Read, Reset, Auto Page Program, Auto Block Erase, Status Read, Page Copy, Mode control Serial input/output Command control Number of valid blocks Min 984 blocks Max 1028 blocks Power supply VCC = 2.7 V to 3.6 V VCCQ = 2.7 V to 3.6 V Access time Cell array to register Serial Read C...