IC61SF12836

IC61SF12832 IC61SF12836 Document Title 128K x 32 Flow Through SyncBurst SRAM Revision History Revision No 0A History Initial Draft Draft Date Remark September 17,2001 The attached datasheets are provided by ICSI. Integrated Circuit Solution Inc reserve the right to change the specifications and products. ICSI will answer to your questions about device. If you have any questions, please contact the ICSI offices. Integrated Circuit Solution Inc. SSR018-0A 09/17/2001 1 Free Datasheet http://www.datasheet4u.com/ IC61SF12832 IC61SF12836 128K x 32, 128K x 36 SYNCHRONOUS FLOW-THROUGH STATIC RAM FEATURES Fast access times: 7.5 ns, 8 ns, 8.5 ns, 10 ns, and 12 ns Internal self-timed write cycle Individual Byte Write Control and Global Write Clock controlled, registered address, data inputs and control signals PentiumTM or linear burst sequence control using MODE input Three chip enables for simple depth expansion and address pipelining Common data inputs and data outputs 100-Pin TQFP (JEDEC LQFP) and 119-pin PBGA package Single +3.3V +10%, -5% power supply Power-down snooze mode DESCRIPTION The ICSI IC61SF12832 and IC61SF12836 are high-speed synchronous static RAM designed to provide a burstable, highperformance for high speed networking and communication applications. It is organized as 131,072 words by 32 bits or 36 bits, fabricated with ICSI's advanced CMOS technology. The device integrates a 2-bit burst counter, high-speed SRAM core, and high-drive ca...