AD7790

Data Sheet FEATURES Power Supply: 2.5 V to 5.25 V operation Normal: 75 μA maximum Power-down: 1 μA maximum RMS noise: 1.1 μV at 9.5 Hz update rate 16-bit p-p resolution Integral nonlinearity: 3.5 ppm typical Simultaneous 50 Hz and 60 Hz rejection Internal clock oscillator Programmable gain amplifier Rail-to-rail input buffer VDD monitor channel Temperature range: –40°C to +105°C 10-lead MSOP Low Power, 16-Bit Buffered Sigma-Delta ADC AD7790 FUNCTIONAL BLOCK DIAGRAM GND VDD REFIN VDD INTERNAL CLOCK AIN BUF 16-BIT ADC DIGITAL PGA SERIAL INTERFACE GND AD7790 03538-0-001 Figure 1. GENERAL DESCRIPTION The AD7790 is a low power, complete analog front end for low frequency measurement applications. It contains a low noise 16-bit ∑-Δ ADC with one differential input that can be buffered or unbuffered along with a digital PGA, which allows gains of 1, 2, 4, and 8. The device operates from an internal clock. Therefore, the user does not have to supply a clock source to the device. The output data rate from the part is software programmable and can be varied from 9.5 Hz to 120 Hz, with the rms noise equal to 1.1 μV at the lower update rate. The internal clock frequency can be divided by a factor of 2, 4, or 8, which leads to a reduction in the current consumption. The update rate, cutoff frequency, and settling time will scale with the clock frequency. The part operates with a power supply from 2.5 V to 5.25 V. When operating from a 3 V supply, the power dissipation for the p...