256K X 8 BIT LOW POWER CMOS SRAM
February 2007
®
AS6C2008
Rev. 1.1
256K X 8 BIT LOW POWER CMOS SRAM
GENERAL DESCRIPTION
The AS6C2008 is a 2,097,152-bi...
Description
February 2007
®
AS6C2008
Rev. 1.1
256K X 8 BIT LOW POWER CMOS SRAM
GENERAL DESCRIPTION
The AS6C2008 is a 2,097,152-bit low power CMOS static random access memory organized as 262,144 words by 8 bits. It is fabricated using very high performance, high reliability CMOS technology. Its standby current is stable within the range of operating temperature. The AS6C2008 is well designed for very low power system applications, and particularly well suited for battery back-up nonvolatile memory application. The AS6C2008 operates from a single power supply of 2.7V ~ 3.6V .
FEATURES
Access time : 55ns Low power consumption: Operating current :20mA (TYP.) Standby current : 1µ A (TYP.) LL-version Single 2.7V ~ 3.6V power supply Fully static operation Tri-state output Data retention voltage : 1.5V (MIN.) All Products ROHS Compliant Package : 32-pin 450 mil SOP 32-pin 8mm x 20mm TSOP-I 32-pin 8mm x 13.4mm sTSOP 36-ball 6mm x 8mm TFBGA
PRODUCT FAMILY
Product Family Operating Temperature Vcc Range Speed Power Dissipation Standby(ISB1,TYP.) Operating(Icc,TYP.)
AS6C2008 (I)
-40 ~ 85ºC
2.7 ~ 3.6V
55ns
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20µA(L)/1µA(LL)
20mA
FUNCTIONAL BLOCK DIAGRAM
PIN DESCRIPTION
SYMBOL DESCRIPTION Address Inputs Data Inputs/Outputs Chip Enable Inputs Write Enable Input Output Enable Input Power Supply Ground No Connection
Vcc Vss
A0 - A17 DQ0 – DQ7
DECODER 256Kx8 MEMORY ARRAY
CE#, CE2 WE# OE# VCC VSS NC
A0-A17
DQ0-DQ7
I/O DATA CIRCUIT
COLUMN I/O
CE# CE2 WE# OE#
C...
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