ST2341A

ST2341A P Channel Enhancement Mode MOSFET -6.0A DESCRIPTION ST2341A is the P-Channel logic enhancement mode power field effect transistor which is produced using high cell density, DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage application such as cellular phone and notebook computer power management, other battery powered circuits, and low in-line power loss are required. The product is in a very small outline surface mount package. PIN CONFIGURATION SOT-23-3L FEATURE -30V/-6.0A, RDS(ON) = 20m-ohm (Typ.) @VGS = -10V -30V/-3.8A, RDS(ON) = 28m-ohm @VGS = -4.5V Super high density cell design for extremely low RDS(ON) Exceptional on-resistance and maximum DC current capability SOT-23-3L package design 3.Drain 3 D G 1 1.Gate 2.Source S 2 http://www.DataSheet4U.net/ PART MARKING SOT-23-3L 3 41YA 1 Y: Year Code 2 A: Process Code STANSON TECHNOLOGY 120 Bentley Square, Mountain View, Ca 94040 USA www.stansontech.com ST2341A 2010. Rev.1 datasheet pdf - http://www.DataSheet4U.net/ ST2341A P Channel Enhancement Mode MOSFET -6.0A ABSOULTE MAXIMUM RATINGS (Ta = 25℃ Unless otherwise noted ) Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain CurrentTJ=150℃) Pulsed Drain Current Continuous Source Current (Diode Conduction) Power Dissipation Operation Junction Temperature http://www.DataSheet4U.net/ Symbol VDSS VGSS TA=25℃ TA=70℃ ID IDM IS PD TJ TSTG RθJ...