Mobile DDR SDRAM 512Mbit
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512Mbit MOBILE DDR SDRAM based on 4M x 4Bank x32 I/O
Specification of 512Mb (16Mx32bit) Mobile DDR...
Description
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512Mbit MOBILE DDR SDRAM based on 4M x 4Bank x32 I/O
Specification of 512Mb (16Mx32bit) Mobile DDR SDRAM
Memory Cell Array
- Organized as 4banks of 4,194,304 x32
This document is a general product description and is subject to change without notice. Hynix does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev 1.2 / Jul. 2008 1
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Mobile DDR SDRAM 512Mbit (16M x 32bit) H5MS5122DFR Series / H5MS5132DFR Series
Document Title 512MBit (4Bank x 4M x 32bits) MOBILE DDR SDRAM Revision History
Revision No.
0.1 0.2 1.0 Initial Draft Update: IDD values Final Version -. Corrected max tDQSCK/tAC at DDR333 from 5.5ns to 5.0ns -. Corrected tDIPW, tIPW and tHZ at DDR400 (tDIPW: 1.8 to 1.4; tIPW: 2.7 to 2.2; tHZ: 5.5 to 5.0) -. Added the 200MHz product in ordering information -. Deleted the extended temperature products Insert the reduced page information
History
Draft Date
Sep.2007 Mar. 2008 Apr. 2008
Remark
Preliminary Preliminary
1.1
May 2008
1.2
Jul. 2008
Rev 1.2 / Jul. 2008
2
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Mobile DDR SDRAM 512Mbit (16M x 32bit) H5MS5122DFR Series / H5MS5132DFR Series
FEATURES SUMMARY
● Mobile DDR SDRAM - Double data rate architecture: two data transfer per clock cycle ● Mobile DDR SDRAM INTERFACE - x32 bus width - Multiplexed Address (Row address and Column address) ● BURST LENGTH ● SUPPLY VOLTAGE - 1.8V device: VDD and VDDQ = 1.7V to 1.95V ● MEMORY CELL ARRAY - 512Mbit (x32...
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