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CY2XP304
High-Frequency Programmable PECL Clock Generation Module
Description
CY2XP304 High-Frequency Programmable PECL Clock Generation Module Features Period jitter peak-peak 125MHz(max.) = 55 ps Four low-skew LVPECL outputs Phase-locked loop (PLL) multiplier select Serially-configurable multiply ratios Eight-bit feedback counter and six-bit reference counter for high accuracy HSTL inputs—HSTL-to-LVPECL level translatio...
Cypress Semiconductor
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