Document
LF PA K
PSMN2R2-30YLC
N-channel 30 V 2.15mΩ logic level MOSFET in LFPAK using NextPower technology
Rev. 02 — 3 May 2011 Product data sheet
1. Product profile
1.1 General description
Logic level enhancement mode N-channel MOSFET in LFPAK package. This product is designed and qualified for use in a wide range of industrial, communications and domestic equipment.
1.2 Features and benefits
High reliability Power SO8 package, qualified to 175°C Low parasitic inductance and resistance Optimised for 4.5V Gate drive utilising NextPower Superjunction technology Ultra low QG, QGD, and QOSS for high system efficiencies at low and high loads
1.3 Applications
DC-to-DC converters Lithium-ion battery protection Load switching Power OR-ing Server power supplies Sync rectifier
1.4 Quick reference data
Table 1. Symbol VDS ID
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Quick reference data Parameter drain-source voltage drain current total power dissipation junction temperature drain-source on-state resistance VGS = 4.5 V; ID = 25 A; Tj = 25 °C; see Figure 12 VGS = 10 V; ID = 25 A; Tj = 25 °C; see Figure 12 Conditions 25 °C ≤ Tj ≤ 175 °C Tmb = 25 °C; VGS = 10 V; see Figure 1 Tmb = 25 °C; see Figure 2
[1]
Min -55 -
Typ 2.3 1.8
Max Unit 30 100 141 175 2.8 V A W °C mΩ
Ptot Tj RDSon
Static characteristics
2.15 mΩ
NXP Semiconductors
PSMN2R2-30YLC
N-channel 30 V 2.15mΩ logic level MOSFET in LFPAK using NextPower
Quick reference data …continued Parameter gate-drain charge Conditions VGS = 4.5 V; ID = 25 A; VDS = 15 V; see Figure 14; see Figure 15 VGS = 4.5 V; ID = 25 A; VDS = 15 V; see Figure 14; see Figure 15 Min Typ 8 Max Unit nC
Table 1. Symbol QGD
Dynamic characteristics
QG(tot)
total gate charge
-
26
-
nC
[1]
Continuous current is limited by package.
2. Pinning information
Table 2. Pin 1 2 3 4 mb Pinning information Symbol Description S S S G D source source source gate mounting base; connected to drain
1 2 3 4
mbb076
Simplified outline
mb
Graphic symbol
D
G S
SOT669 (LFPAK; Power-SO8)
3. Ordering information
Table 3. Ordering information Package Name PSMN2R2-30YLC LFPAK; Power-SO8 Description plastic single-ended surface-mounted package; 4 leads Version SOT669 Type number
4. Marking
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Table 4.
Marking codes Marking code[1] 2C230L
Type number PSMN2R2-30YLC
[1] % = placeholder for manufacturing site code
PSMN2R2-30YLC
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 02 — 3 May 2011
2 of 15
NXP Semiconductors
PSMN2R2-30YLC
N-channel 30 V 2.15mΩ logic level MOSFET in LFPAK using NextPower
5. Limiting values
Table 5. Symbol VDS VDGR VGS ID IDM Ptot Tstg Tj Tsld(M) VESD IS ISM EDS(AL)S Limiting values Parameter drain-source voltage drain-gate voltage gate-source voltage drain current peak drain current total power dissipation storage temperature junction temperature peak soldering temperature electrostatic discharge voltage source current peak source current non-repetitive drain-source avalanche energy MM (JEDEC JESD22-A115) Tmb = 25 °C pulsed; tp ≤ 10 µs; Tmb = 25 °C VGS = 10 V; Tj(init) = 25 °C; ID = 100 A; Vsup ≤ 30 V; RGS = 50 Ω; unclamped; see Figure 3
[1]
In accordance with the Absolute Maximum Rating System (IEC 60134).
Conditions 25 °C ≤ Tj ≤ 175 °C 25 °C ≤ Tj ≤ 175 °C; RGS = 20 kΩ VGS = 10 V; Tmb = 25 °C; see Figure 1 VGS = 10 V; Tmb = 100 °C; see Figure 1 pulsed; tp ≤ 10 µs; Tmb = 25 °C; see Figure 4 Tmb = 25 °C; see Figure 2
[1] [1]
Min -20 -55 -55 630 -
Max 30 30 20 100 100 765 141 175 175 260 100 765 92
Unit V V V A A A W °C °C °C V A A mJ
Source-drain diode
Avalanche ruggedness
[1]
Continuous current is limited by package.
240 ID (A) 180
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003a a f 885
120 Pder (%) 80
03na19
120
(1)
40
60
0 0 50 100 150 200 Tmb (°C)
0
0
50
100
150
Tmb (°C)
200
Fig 1.
Continuous drain current as a function of mounting base temperature
Fig 2.
Normalized total power dissipation as a function of mounting base temperature
© NXP B.V. 2011. All rights reserved.
PSMN2R2-30YLC
All information provided in this document is subject to legal disclaimers.
Product data sheet
Rev. 02 — 3 May 2011
3 of 15
NXP Semiconductors
PSMN2R2-30YLC
N-channel 30 V 2.15mΩ logic level MOSFET in LFPAK using NextPower
103 I AL (A) 102
(1)
003a a f 899
(2)
10
1
10-1 10-3
10-2
10-1
1
tAL (ms )
10
Fig 3.
104 ID (A) 103
Single pulse avalanche rating; avalanche current as a function of avalanche time
003aaf886
Limit RDSon = VDS / ID 102 tp =10 μ s 100 μ s 10 DC 1 ms 1 10 ms 100 ms
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10-1 10-1
1
10
VDS (V)
102
Fig 4.
Safe operating area; continuous and peak drain currents as a function of drain-source voltage
PSMN2R2-30YLC
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 02 — 3 May 2011
4 of 15
NXP Semiconductors
PSMN2R2-30YLC
N-channel 30 V 2.15m.