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KSZ8841-32MQL Dataheets PDF



Part Number KSZ8841-32MQL
Manufacturers Micrel Semiconductor
Logo Micrel Semiconductor
Description Single-Port Ethernet MAC Controller
Datasheet KSZ8841-32MQL DatasheetKSZ8841-32MQL Datasheet (PDF)

KSZ8841-16/32MQL/MVL/MVLI/MBL Single-Port Ethernet MAC Controller with Non-PCI Interface Rev. 1.6 General Description The KSZ8841-series single-port chip includes PCI and non-PCI CPU interfaces, and are available in 8/16-bit and 32-bit bus designs. This datasheet describes the KSZ8841M-series of non-PCI CPU interface chips. For information on the KSZ8841 PCI CPU interface chips, refer to the KSZ8841P datasheet. The KSZ8841M is a single chip, mixed analog/digital device offering Wake-on-LAN tech.

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KSZ8841-16/32MQL/MVL/MVLI/MBL Single-Port Ethernet MAC Controller with Non-PCI Interface Rev. 1.6 General Description The KSZ8841-series single-port chip includes PCI and non-PCI CPU interfaces, and are available in 8/16-bit and 32-bit bus designs. This datasheet describes the KSZ8841M-series of non-PCI CPU interface chips. For information on the KSZ8841 PCI CPU interface chips, refer to the KSZ8841P datasheet. The KSZ8841M is a single chip, mixed analog/digital device offering Wake-on-LAN technology for effectively addressing Fast Ethernet applications. It consists of a Fast Ethernet MAC controller, an 8-bit, 16-bit, and 32-bit generic host processor interface and incorporates a unique dynamic memory pointer with 4-byte buffer boundary and a fully utilizable 8KB for both TX and RX directions in host buffer interface. The KSZ8841M is designed to be fully compliant with the appropriate IEEE 802.3 standards. An industrial temperature-grade version of the KSZ8841M, the KSZ8841MVLI, also can be ordered (see “Ordering Information section). LinkMD® Physical signal transmission and reception are enhanced through the use of analog circuitry, making the design more efficient and allowing for lower-power consumption. The KSZ8841M is designed using a low-power CMOS process that features a single 3.3V power supply with 5V tolerant I/O. It has an extensive feature set that offers management information base (MIB) counters and CPU control/data interfaces. The KSZ8841M includes a unique cable diagnostics ® feature called LinkMD . This feature determines the length of the cabling plant and also ascertains if there is an open or short condition in the cable. Accompanying software enables the cable length and cable conditions to be conveniently displayed. In addition, the KSZ8841M supports Hewlett Packard (HP) Auto-MDIX thereby eliminating the need to differentiate between straight or crossover cables in applications. Functional Diagram P 1 H P A u to M D I/M D I-X 1 0 /1 0 0 B a s e -T /T X PHY H ost M A C E m b e d d e d P ro c e s s o r In te rfa c e N o n -P C I CPU Bus In te rfa c e U n it QM U DM A C hannel RXQ 4KB TXQ 4KB 8 ,1 6 , o r 3 2 - b it G e n e r ic H o s t In te rfa c e C o n tro l R e g is te r s M IB C o u n te rs P 1 L E D [3 :0 ] LED D r iv e r EEPROM In te rfa c e www.DataSheet4U.com E E P R O M I/F Figure 1. KSZ8841M Functional Diagram LinkMD is a registered trademark of Micrel, Inc. Magic Packet is a trademark of Advanced Micro Devices, Inc. Product names used in this datasheet are for identification purposes only and may be trademarks of their respective companies. Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com October 2007 M9999-102207-1.6 Micrel, Inc. KSZ8841-16/32 MQL/MVL/MBL Features • Single chip Ethernet controller with IEEE802.3u support • Supports 10BASE-T/100BASE-TX • Supports IEEE 802.3x full-duplex flow control and half-duplex backpressure collision flow control • Supports burst data transfers • 8KB internal memory for RX/TX FIFO buffers • Early TX/RX functions to minimize latency through the device • Optional to use external serial EEPROM configuration for both KSZ8841-16MQL and KSZ8841-32MQL • Single 25MHz reference clock for both PHY and MAC Network Features • • • • • Fully integrated to comply with IEEE802.3u standards 10BASE-T and 100BASE-TX physical layer support Auto-negotiation: 10/100Mbps full and half duplex Adaptive equalizer Baseline wander correction Additional Features In addition to offering all of the features of a Layer 2 controller, the KSZ8841M offers: • Dynamic buffer memory scheme – Essential for applications such as Video over IP where image jitter is unacceptable • Flexible 8-bit, 16-bit, and 32-bit generic host processor interfaces • Micrel LinkMD™ cable diagnostic capabilities to determine cable length, diagnose faulty cables, and determine distance to fault • Wake-on-LAN functionality – Incorporates Magic Packet™, network link state, and wake-up frame technology • HP Auto MDI-X™ crossover with disable/enable option • Ability to transmit and receive frames up to 1916 bytes Applications • • • • • • • • Video Distribution Systems High-end Cable, Satellite, and IP set-top boxes Video over IP Voice over IP (VoIP) and Analog Telephone Adapters (ATA) Industrial Control in Latency Critical Applications Motion Control Industrial Control Sensor Devices (Temperature, Pressure, Levels, and Valves) Security and Surveillance Cameras Power Modes, Power Supplies, and Packaging • Single power supply (3.3V) with 5V tolerant I/O buffers • Enhanced power management feature with powerdown feature to ensure low-power dissipation during device idle periods • Comprehensive LED indicator support for link, activity, full/half duplex, and 10/100 speed (4 LEDs) – User programmable • Low-power CMOS design o o • Commercial Temperature Range: 0 C to +70 C o o • Industrial Temperature Ra.


KSZ8841-32MVL KSZ8841-32MQL KSZ8842-16MBL


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