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CY7C1916BV18

Part Number	CY7C1916BV18
Manufacturer	Cypress Semiconductor
Description	18-Mbit DDR-II SRAM 2-Word Burst Architecture
Published	Apr 15, 2011
Detailed Description	CY7C1316BV18 CY7C1916BV18 CY7C1318BV18 CY7C1320BV18 18-Mbit DDR-II SRAM 2-Word Burst Architecture Features • 18-Mbit de...
Datasheet	CY7C1916BV18 PDF File

Overview

CY7C1316BV18 CY7C1916BV18 CY7C1318BV18 CY7C1320BV18 18-Mbit DDR-II SRAM 2-Word Burst Architecture Features • 18-Mbit density (2M x 8, 2M x 9, 1M x 18, 512K x 36) • 300-MHz clock for high bandwidth • 2-Word burst for reducing address bus frequency • Double Data Rate (DDR) interfaces (data transferred at 600 MHz) @ 300 MHz • Two input clocks (K and K) for precise DDR timing — SRAM uses rising edges only • Two input clocks for output data (C and C) to minimize clock-skew and flight-time mismatches • Echo clocks (CQ and CQ) simplify data capture in high-speed systems • Synchronous internally self-timed writes • 1.
8V core power supply with HSTL inputs and outputs • Variable drive HSTL output buf...

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CY7C1916BV18 18-Mbit DDR-II SRAM 2-Word Burst Architecture - Cypress Semiconductor

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