PCS3P7101A

September 2006 rev 0.1 Low Power Peak EMI Reducing clock synthesizer PCS3P7101A www.DataSheet4U.com Features Generates a 4x low EMI clock at the output Input frequency: 25 MHz Integrated loop filter components. Frequency deviation: ±0.25% (Typ) center spread Operates with a 3.3V Supply. Low power CMOS design. Available in 8-pin SOIC package. Pin compatible with ICS 341-22 Product Description The PCS3P7101A is a low cost, single-output, clock synthesizer. The PCS3P7101A generates a 4x output clock from a 25 MHz standard fundamental mode, inexpensive crystal, or clock. It can replace multiple crystals and oscillators, saving valuable board space and cost. The device employs Spread Spectrum technique to reduce system electro-magnetic interference (EMI). The device also has a power-down feature that tri-state the clock output and turns off the PLL when the PD pin is taken low. Block Diagram VDD PD Modulation XIN/CLKIN XOUT Crystal Oscillator Frequency Divider Feedback Divider Phase Detector Loop Filter PLL VCO Output Divider ModOUT VSS PulseCore Semiconductor Corporation 1715 S. Bascom Ave Suite 200, Campbell, CA 95008 Tel: 408-879-9077 Fax: 408-879-9018 www.pulsecoresemi.com Notice: The information in this document is subject to change without notice. September 2006 rev 0.1 Pin Configuration CLKIN/XIN 1 VDD 2 8 XOUT PCS3P7101A www.DataSheet4U.com 7 PD PCS3P7101A VSS 3 NC 4 6 NC 5 ModOUT Pin Description Pin # Pin Name 1 2 3 4 5 6 7 8 CLKIN/XI...