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CY8C20446 Dataheets PDF



Part Number CY8C20446
Manufacturers Cypress Semiconductor
Logo Cypress Semiconductor
Description (CY8C20Xx6) CapSense Applications
Datasheet CY8C20446 DatasheetCY8C20446 Datasheet (PDF)

CapSense Applications Features ■ ■ CY8C20X36/46/66/96 ® 1.71V to 5.5V Operating Range Low Power CapSense Block ❐ Configurable Capacitive Sensing Elements ❐ Supports Combination of CapSense Buttons, Sliders, Touchpads, Touch Screens, and Proximity Sensor Powerful Harvard Architecture Processor ❐ M8C Processor Speeds Running to 24 MHz ❐ Low Power at High Speed ❐ Interrupt Controller ❐ Temperature Range: -40°C to +85°C Flexible On-Chip Memory ❐ Three Program/Data Storage Size Options: • CY8C20x36.

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CapSense Applications Features ■ ■ CY8C20X36/46/66/96 ® 1.71V to 5.5V Operating Range Low Power CapSense Block ❐ Configurable Capacitive Sensing Elements ❐ Supports Combination of CapSense Buttons, Sliders, Touchpads, Touch Screens, and Proximity Sensor Powerful Harvard Architecture Processor ❐ M8C Processor Speeds Running to 24 MHz ❐ Low Power at High Speed ❐ Interrupt Controller ❐ Temperature Range: -40°C to +85°C Flexible On-Chip Memory ❐ Three Program/Data Storage Size Options: • CY8C20x36: 8K Flash / 1K SRAM • CY8C20x46, CY8C20x96: 16K Flash / 2K SRAM • CY8C20x66: 32K Flash / 2K SRAM ❐ 50,000 Flash Erase/Write Cycles ❐ Partial Flash Updates ❐ Flexible Protection Modes ❐ In-System Serial Programming (ISSP) Full Speed USB ❐ Available on CY8C20646, CY8C20666, CY8C20x96 Only ❐ 12 Mbps USB 2.0 Compliant ❐ Eight Unidirectional Endpoints ❐ One Bidirectional Control Endpoint ❐ Dedicated 512 Byte Buffer ❐ Internally Regulated at 3.3V Precision, Programmable Clocking ❐ Internal Main Oscillator: 6/12/24 MHz ± 5% ❐ Internal Low Speed Oscillator at 32 kHz for Watchdog and Sleep Timers ❐ Precision 32 kHz Oscillator for Optional External Crystal ❐ 0.25% Accuracy for USB with No External Components (CY8C20646, CY8C20666, CY8C20x96 only) Programmable Pin Configurations ❐ Up to 36 GPIO (Depending on Package) ❐ Dual Mode GPIO: All GPIO Support Digital I/O and Analog Input ❐ 25 mA Sink Current on All GPIO ❐ Pull up, High Z, Open Drain Modes on All GPIO ❐ CMOS Drive Mode (5 mA Source Current) on Ports 0 and 1: • 20 mA (at 3.0V) Total Source Current on Port 0 • 20 mA (at 3.0V) Total Source Current on Port 1 ❐ Selectable, Regulated Digital I/O on Port 1 ❐ Configurable Input Threshold on Port 1 ❐ Hot Swap Capability on all Port 1 GPIO ® ■ Versatile Analog Mux ❐ Common Internal Analog Bus ❐ Simultaneous Connection of I/O ❐ High PSRR Comparator ❐ Low Dropout Voltage Regulator for All Analog Resources Additional System Resources ❐ I2C Slave: • Selectable to 50 kHz, 100 kHz, or 400 kHz • No Clock Stretching Required (under most conditions) • Implementation During Sleep Modes with Less Than 100 µA • Hardware Address Validation ❐ SPI™ Master and Slave: Configurable 46.9 kHz to 12 MHz ❐ Three 16-Bit Timers ❐ Watchdog and Sleep Timers ❐ Internal Voltage Reference ❐ Integrated Supervisory Circuit ❐ 8-bit Delta-Sigma Analog-to-Digital Converter ❐ Two General Purpose High Speed, Low Power Analog Comparators Complete Development Tools ❐ Free Development Tool (PSoC Designer™) ❐ Full Featured, In-Circuit Emulator and Programmer ❐ Full Speed Emulation ❐ Complex Breakpoint Structure ❐ 128K Trace Memory Package Options ❐ CY8C20x36: • 16-Pin 3 x 3 x 0.6 mm QFN • 24-Pin 4 x 4 x 0.6 mm QFN • 32-Pin 5 x 5 x 0.6 mm QFN • 48-Pin SSOP • 48-Pin 7 x 7 x 1.0 mm QFN ❐ CY8C20x46: • 16-Pin 3 x 3 x 0.6 mm QFN • 24-Pin 4 x 4 x 0.6 mm QFN • 32-Pin 5 x 5 x 0.6 mm QFN • 48-Pin SSOP • 48-Pin 7 x 7 x 1.0 mm QFN (with USB) ❐ CY8C20x96: • 24-Pin 4 x 4 x 0.6 mm QFN (with USB) • 32-Pin 5 x 5 x 0.6 mm QFN (with USB) ❐ CY8C20x66: • 32-Pin 5 x 5 x 0.6 mm QFN • 48-Pin 7 x 7 x 1.0 mm QFN (with USB) • 48-Pin SSOP ■ ■ ■ ■ ■ ■ ■ ■ Cypress Semiconductor Corporation Document Number: 001-12696 Rev. *F • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600 Revised September 09, 2009 [+] Feedback www.DataSheet.in CY8C20X36/46/66/96 Logic Block Diagram Port 4 Port 3 Port 2 Port 1 Port 0 1.8/2.5/3V LDO PWRSYS (Regulator) PSoC CORE SYSTEM BUS Global Analog Interconnect 1K/2K SRAM Interrupt Controller Supervisory ROM (SROM) 8K/16K/32K Flash Nonvolatile Memory Sleep and Watchdog CPU Core (M8C) 6/12/24 MHz Internal Main Oscillator (IMO) Internal Low Speed Oscillator (ILO) Multiple Clock Sources CAPSENSE SYSTEM Two Comparators CapSense Module Analog Reference Analog Mux SYSTEM BUS USB I2C Slave Internal Voltage References System Resets POR and LVD SPI Master/ Slave Three 16-Bit Programmable Timers Digital Clocks SYSTEM RESOURCES Document Number: 001-12696 Rev. *F Page 2 of 39 www.DataSheet.in [+] Feedback CY8C20X36/46/66/96 PSoC® Functional Overview The PSoC family consists of on-chip Controller devices. These devices are designed to replace multiple traditional MCU-based components with one, low cost single-chip programmable component. A PSoC device includes configurable analog and digital blocks, and programmable interconnect. This architecture allows the user to create customized peripheral configurations, to match the requirements of each individual application. Additionally, a fast CPU, Flash program memory, SRAM data memory, and configurable I/O are included in a range of convenient pinouts. The architecture for this device family, as shown in the Logic Block Diagram on page 2, is comprised of three main areas: the Core, the CapSense Analog System, and the System Resources (including a full speed USB port). A common, versatile bus allows connection between I/O and the analog system. Each CY8C20x36/46/66/96 PSoC Device incl.


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