DatasheetsPDF.com

C8051F902

Silicon Laboratories

12/10-Bit ADC MCU

C8051F91x-C8051F90x Single/Dual Battery, 0.9–3.6 V, 16–8 kB, SmaRTClock, 12/10-Bit ADC MCU Ultra-Low Power - 160 uA/MHz ...


Silicon Laboratories

C8051F902

File Download Download C8051F902 Datasheet


Description
C8051F91x-C8051F90x Single/Dual Battery, 0.9–3.6 V, 16–8 kB, SmaRTClock, 12/10-Bit ADC MCU Ultra-Low Power - 160 uA/MHz in active mode (24.5 MHz clock) - 2 us wake-up time (two-cell mode) - 10 nA sleep mode with memory retention; - 50 nA sleep mode with brownout detector - 300 nA sleep mode with LFO (‘F912/02 only) - 600 nA sleep mode with external crystal Supply Voltage 0.9 to 3.6 V - One-cell mode supports 0.9 to 1.8 V operation (‘F911/01). ‘F912 and ‘F902 devices can operate from 0.9 to 3.6 V continuously - Two-cell mode supports 1.8 to 3.6 V operation - Built-in dc-dc converter with 1.8 to 3.3 V output for use in one-cell mode - Built-in LDO regulator allows a high analog supply voltage and low digital core voltage - 2 built in supply monitors (brownout detectors) 12-Bit or 10-Bit Analog to Digital Converter - ±1 LSB INL (10-bit mode); ±1.5 LSB INL (12-bit mode, ‘F912/02 only) no missing codes - Programmable throughput up to 300 ksps (10-Bit Mode) or 75 ksps (12-bit mode, ‘F912/02 only) - Up to 15 external inputs - On-chip voltage reference - On-Chip PGA allows measuring voltages up to twice the reference voltage - 16-bit auto-averaging accumulator with burst mode provides increased ADC resolution - Data dependent windowed interrupt generator - Built-in temperature sensor High-Speed 8051 µC Core - Pipelined instruction architecture; executes 70% of instructions in 1 or 2 system clocks - Up to 25 MIPS throughput with 25 MHz clock - Expanded interrupt handler Memory - 768...




Similar Datasheet




@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site. (Privacy Policy & Contact)