Mixed Signal ISP Flash MCU
Analog Peripherals - 12-Bit ADC
• Up to 200 ksps • Up to 32 external single-ended inputs • VREF from on-chip VREF, exter...
Description
Analog Peripherals - 12-Bit ADC
Up to 200 ksps Up to 32 external single-ended inputs VREF from on-chip VREF, external pin or VDD Internal or external start of conversion source Built-in temperature sensor
- Two Comparators
Programmable hysteresis and response time Configurable as interrupt or reset source Low current
On-Chip Debug - On-chip debug circuitry facilitates full speed, non-
intrusive in-system debug (no emulator required)
- Provides breakpoints, single stepping, inspect/modify memory and registers
- Superior performance to emulation systems using ICE-chips, target pods, and sockets
- Low cost, complete development kit
Supply Voltage 1.8 to 5.25 V - Typical operating current: 19 mA at 50 MHz;
- Typical stop mode current: 2 µA
High-Speed 8051 µC Core - Pipelined instruction architecture; executes 70% of
instructions in 1 or 2 system clocks
- Up to 50 MIPS throughput with 50 MHz clock
- Expanded interrupt handler
C8051F50x/F51x
Mixed Signal ISP Flash MCU Family
Memory - 4352 bytes internal data RAM (256 + 4096 XRAM) - 64 or 32 kB Flash; In-system programmable in
512-byte Sectors Digital Peripherals - 40, 33, or 25 Port I/O; All 5 V tolerant - CAN 2.0 Controller—no crystal required - LIN 2.1 Controller (Master and Slave capable); no
crystal required - Hardware enhanced UART, SMBus™, and
enhanced SPI™ serial ports - Four general purpose 16-bit counter/timers - 16-Bit programmable counter array (PCA) with six
capture/compare modules and enhanced PWM func...
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