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LP62S1664CV-55LLT Dataheets PDF



Part Number LP62S1664CV-55LLT
Manufacturers AMIC Technology
Logo AMIC Technology
Description 64K X 16 BIT LOW VOLTAGE CMOS SRAM
Datasheet LP62S1664CV-55LLT DatasheetLP62S1664CV-55LLT Datasheet (PDF)

LP62S1664C Series Preliminary Document Title 64K X 16 BIT LOW VOLTAGE CMOS SRAM Revision History Rev. No. 0.0 64K X 16 BIT LOW VOLTAGE CMOS SRAM History Initial issue Issue Date February 19, 2002 Remark Preliminary PRELIMINARY (February, 2002, Version 0.0) AMIC Technology, Inc. LP62S1664C Series Preliminary Features n Operating voltage: 2.7V to 3.6V n Access times: 55/70 ns (max.) n Current: LP62S1664C-55 series: Operating: 50mA (max.) Standby: 5µA (max.) LP62S1664C-70 series: Operating:.

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LP62S1664C Series Preliminary Document Title 64K X 16 BIT LOW VOLTAGE CMOS SRAM Revision History Rev. No. 0.0 64K X 16 BIT LOW VOLTAGE CMOS SRAM History Initial issue Issue Date February 19, 2002 Remark Preliminary PRELIMINARY (February, 2002, Version 0.0) AMIC Technology, Inc. LP62S1664C Series Preliminary Features n Operating voltage: 2.7V to 3.6V n Access times: 55/70 ns (max.) n Current: LP62S1664C-55 series: Operating: 50mA (max.) Standby: 5µA (max.) LP62S1664C-70 series: Operating: 40mA (max.) Standby: 5µA (max.) n Extended operating temperature range : -40°C to 85°C for -LLI series n Full static operation, no clock or refreshing required n All inputs and outputs are directly TTL-compatible n Common I/O using three-state output n Data retention voltage: 2V (min.) n Available in 44-pin TSOP and 48-ball Mini BGA (6X8) packages. 64K X 16 BIT LOW VOLTAGE CMOS SRAM General Description The LP62S1664C is a low operating current 1,048,576bit static random access memory organized as 65,536 words by 16 bits and operates on low power supply voltage from 2.7V to 3.6V. It is built using AMIC’s high performance CMOS process. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures. The chip enable input is provided for POWER-DOWN, device enable. Two byte enable inputs and an output enable input are included for easy interfacing. Data retention is guaranteed at a power supply voltage as low as 2V. Product Family Product Family LP62S1664C Operating Temperature -40°C ~ +85°C VCC Range 2.7V~3.6V Power Dissipation Speed 55ns / 70ns Data Retention (ICCDR, Typ.) 0.2µA Standby (ISB1, Typ.) 0.3µA Operating (ICC2, Typ.) 3mA Package Type 44L TSOP 48B MBGA 1. Typical values are measured at VCC = 3.0V, TA = 25°C and not 100% tested. 2. Data retention current VCC = 2.0V. Pin Configuration n TSOP (Type II) A4 A3 A2 A1 A0 CE I/O0 I/O1 I/O2 I/O3 VCC GND I/O4 I/O5 I/O6 I/O7 WE A15 A14 A13 A12 NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 A5 A6 A7 OE HB LB I/O15 I/O14 I/O13 I/O12 GND VCC I/O11 I/O10 I/O9 I/O8 NC A8 A9 A10 A11 NC n Mini BGA (6X8) Top View 1 A B C D E F G H LB I/O8 I/O9 VSS VCC I/O14 I/O15 NC 2 OE 3 A0 A3 A5 NC NC A14 A12 A9 4 A1 A4 A6 A7 NC A15 A13 A10 5 A2 6 NC I/O0 I/O2 VCC VSS I/O6 I/O7 NC HB I/O10 I/O11 I/O12 I/O13 NC A8 CS I/O1 I/O3 I/O4 I/O5 WE A11 LP62S1664CV LP62S1664CU PRELIMINARY (February, 2002, Version 0.0) 1 AMIC Technology, Inc. LP62S1664C Series Block Diagram A0 VCC GND 512 X 2048 DECODER A14 MEMORY ARRAY A15 I/O0 COLUMN I/O INPUT DATA CIRCUIT I/O8 INPUT DATA CIRCUIT I/O7 I/O15 CE LB HB OE WE CONTROL CIRCUIT PRELIMINARY (February, 2002, Version 0.0) 2 AMIC Technology, Inc. LP62S1664C Series Pin Description - TSOP Pin No. 1 - 5, 18 - 21, 24 - 27,42 - 44 6 7 - 10, 13 - 16, 29 - 32, 35 - 38 17 39 40 41 11, 33 12, 34 22 , 23, 28 Symbol A0 - A15 CE I/O0 - I/O15 WE LB HB OE VCC GND NC Description Address Inputs Chip Enable Input Data Input/Outputs Write Enable Input Byte Enable Input (I/O0 to I/O7) Byte Enable Input (I/O8 to I/O15) Output Enable Input Power Ground No Connection Recommended DC Operating Conditions (TA = -25°C to + 85°C for –LLT or -40°C to 85°C for -LLI) Symbol VCC GND VIH VIL CL TTL Parameter Supply Voltage Ground Input High Voltage Input Low Voltage Output Load Output Load Min. 2.7 0 2.2 -0.3 Typ. 3.0 0 Max. 3.6 0 VCC + 0.3 +0.6 30 1 Unit V V V V pF - PRELIMINARY (February, 2002, Version 0.0) 3 AMIC Technology, Inc. LP62S1664C Series Absolute Maximum Ratings* VCC to GND . . . . . . . . . . . . . . . . . . . . . -0.5V to +4.6V IN, IN/OUT Volt to GND . . . . . . . . -0.5V to VCC + 0.5V Operating Temperature, Topr . . . . . . . . -40°C to +85°C Storage Temperature, Tstg . . . . . . . . . -55°C to +125°C Power Dissipation, PT . . . . . . . . . . . . . . . . . . . . . 0.7W Soldering Temp. & Time . . . . . . . . . . . . 260°C, 10 sec *Comments Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to this device. These are stress ratings only. Functional operation of this device at these or any other conditions above those indicated in the operational sections of this specification is not implied or intended. Exposure to the absolute maximum rating conditions for extended periods may affect device reliability. DC Electrical Characteristics (TA = -25°C to + 85°C for -LLT or -40°C to + 85°C for -LLI, VCC = 2.7V to 3.6V, GND = 0V) Symbol Parameter LP62S1664C-55LLT/LLI Min. ILI Input Leakage Current Output Leakage Current Max. 1 LP62S1664C-70LLT/LLI Min. Max. 1 µA VIN = GND to VCC CE = VIH or OE = VIH or LB = HB = VIH or WE = VIL VI/O = GND to VCC CE = VIL, II/O = 0mA Min. Cycle, Duty = 100% CE = VIL, II/O = 0mA CE = VIL, VIH = VCC, VIL = 0V, f = 1MHz, II/O = 0 mA CE = VIH CE ≥ VCC - 0.2V VIN ≥ 0V IOL = 2.1mA IOH = -1.0mA Unit Conditions ILO - 1 - 1 µA ICC ICC1 Active Po.


LP62S1664CV-55LLI LP62S1664CV-55LLT LP62S1664CV-70LLI


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