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LP62S16256EV-70LLT Dataheets PDF



Part Number LP62S16256EV-70LLT
Manufacturers AMIC Technology
Logo AMIC Technology
Description 256K X 16 BIT LOW VOLTAGE CMOS SRAM
Datasheet LP62S16256EV-70LLT DatasheetLP62S16256EV-70LLT Datasheet (PDF)

LP62S16256E-T Series 256K X 16 BIT LOW VOLTAGE CMOS SRAM Document Title 256K X 16 BIT LOW VOLTAGE CMOS SRAM Revision History Rev. No. 2.0 History Change VCCmax from 3.3V to 3.6V Add product family and 55ns specification Issue Date January 25, 2002 Remark (January, 2002, Version 2.0) AMIC Technology, Inc. LP62S16256E-T Series 256K X 16 BIT LOW VOLTAGE CMOS SRAM Features n Operating voltage: 2.7V to 3.6V n Access times: 55ns / 70ns (max.) n Current: Very low power version: Operating: 40mA (m.

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LP62S16256E-T Series 256K X 16 BIT LOW VOLTAGE CMOS SRAM Document Title 256K X 16 BIT LOW VOLTAGE CMOS SRAM Revision History Rev. No. 2.0 History Change VCCmax from 3.3V to 3.6V Add product family and 55ns specification Issue Date January 25, 2002 Remark (January, 2002, Version 2.0) AMIC Technology, Inc. LP62S16256E-T Series 256K X 16 BIT LOW VOLTAGE CMOS SRAM Features n Operating voltage: 2.7V to 3.6V n Access times: 55ns / 70ns (max.) n Current: Very low power version: Operating: 40mA (max.) Standby: 10µA (max.) n Full static operation, no clock or refreshing required n All inputs and outputs are directly TTL-compatible n Common I/O using three-state output n Data retention voltage: 2.0V (min.) n Available in 44-pin TSOP and 48-ball CSP (6 × 8mm) packages General Description The LP62S16256E-T is a low operating current 4,194,304bit static random access memory organized as 262,144 words by 16 bits and operates on low power voltage from 2.7V to 3.3V. It is built using AMIC's high performance CMOS process. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures. The chip enable input is provided for POWER-DOWN, device enable. Two byte enable inputs and an output enable input are included for easy interfacing. Data retention is guaranteed at a power supply voltage as low as 2.0V. Product Family Product Family Operating Temperature -25°C ~ +85°C VCC Range 2.7V~3.6V Speed Power Dissipation Data Retention Standby Operating (ICCDR, Typ.) (ISB1, Typ.) (ICC2, Typ.) 0.08µA 0.3µA 5mA Package Type 44L TSOP 48B CSP LP62S16256E-T 55ns / 70ns 1. Typical values are measured at VCC = 3.0V, TA = 25°C and not 100% tested. 2. Data retention current VCC = 2.0V. Pin Configurations n TSOP n CSP (Chip Size Package) 48-pin Top View A4 A3 A2 A1 A0 CE I/O1 I/O2 I/O3 I/O4 VCC GND I/O5 I/O6 I/O7 I/O8 WE A17 A16 A15 A14 A13 1 2 3 4 44 43 42 41 A5 A6 A7 OE HB LB I/O16 I/O15 I/O14 I/O13 GND VCC I/O12 I/O11 I/O10 I/O9 NC A8 A9 A10 A11 A12 1 A B C D E F G H LB I/O9 I/O10 GND VCC I/O15 I/O16 NC 2 OE HB I/O11 I/O12 I/O13 I/O14 NC A8 3 A0 A3 A5 A17 NC A14 A12 A9 4 A1 A4 A6 A7 A16 A15 A13 A10 5 A2 CE I/O2 I/O4 I/O5 I/O6 WE A11 6 NC I/O1 I/O3 VCC GND I/O7 I/O8 NC LP62S16256EV-T 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 (January, 2002, Version 2.0) 2 AMIC Technology, Inc. LP62S16256E-T Series Block Diagram A0 VCC GND 512 X 8192 DECODER A16 MEMORY ARRAY A17 I/O1 COLUMN I/O INPUT DATA CIRCUIT I/O9 INPUT DATA CIRCUIT I/O8 I/O16 CE LB HB OE WE CONTROL CIRCUIT Pin Descriptions -- TSOP Pin No. 1 - 5, 18 - 27, 42 - 44 6 7 - 10, 13 - 16, 29 - 32, 35 - 38 17 39 40 41 11, 33 12, 34 28 Symbol A0 - A17 CE I/O1 - I/O16 WE LB HB OE VCC GND NC Description Address Inputs Chip Enable Input Data Inputs/Outputs Write Enable Input Lower Byte Enable Input (I/O1 to I/O8) Higher Byte Enable Input (I/O9 to I/O16) Output Enable Input Power Ground No Connection (January, 2002, Version 2.0) 3 AMIC Technology, Inc. LP62S16256E-T Series Pin Description - CSP Symbol A0 - A17 Description Address Inputs Symbol HB Description Higher Byte Enable Input (I/O9 - I/O16) Output Enable Power Supply Ground No Connection CE I/O1 - I/O16 WE LB Chip Enable Data Input/Output Write Enable Input Byte Enable Input (I/O1 - I/O8) OE VCC GND NC Recommended DC Operating Conditions (TA = -25°C to + 85°C) Symbol VCC GND VIH VIL CL TTL Parameter Supply Voltage Ground Input High Voltage Input Low Voltage Output Load Output Load Min. 2.7 0 2.2 -0.3 Typ. 3 0 Max. 3.6 0 VCC + 0.3 +0.6 30 1 Unit V V V V pF - (January, 2002, Version 2.0) 4 AMIC Technology, Inc. LP62S16256E-T Series Absolute Maximum Ratings* VCC to GND ..............................................-0.5V to +4.0V IN, IN/OUT Volt to GND ................... -0.5V to VCC + 0.5V Operating Temperature, Topr ...................-25°C to +85°C Storage Temperature, Tstg.....................-55°C to +125°C Power Dissipation, PT ...................................................................... 0.7W *Comments Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to this device. These are stress ratings only. Functional operation of this device at these or any other conditions above those indicated in the operational sections of this specification is not implied or intended. Exposure to the absolute maximum rating conditions for extended periods may affect device reliability. DC Electrical Characteristics (TA = -25°C to + 85°C, VCC = 2.7V to 3.6V, GND = 0V) Symbol Parameter LP62S16256E-55LLT / 70LLT Min. ILI Input Leakage Current Typ. Max. 1 µA µA VIN = GND to VCC CE = VIH HB = VIH or OE = VIH or WE = VIH VI/O = GND to VCC CE = VIL, II/O = 0mA Unit Conditions ILO Output Leakage Current - - 1 ICC Active Power Supply Current - - 5 mA ICC1 Dynamic Operating Current ICC2 - 25 40 mA Min. Cycle, Duty = 100% CE = VI, II/O = 0mA .


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