R8830

RDC® www.DataSheet4U.com RISC DSP Communication R8830 16-BIT RISC MICROCONTROLLER 16-BIT RISC MICROCONTROLLER R8830 Brief Sheet Specifications subject to change without notice, contact your sales representatives for the most update information. Page 1 of 5 REV 1.0 Aug.07 2006 RDC® 1. Features l CPU Core www.DataSheet4U.com RISC DSP Communication R8830 16-BIT RISC MICROCONTROLLER - proprietary RISC architecture - Five-stage pipeline - CPU Clock speed up to 40 MHz - Supports CPU ID - Supports 32 PIO pins l Bus interface - Multiplexed address and data bus which is compatible with the 80C188 microprocessor - Supports a non-multiplexed address bus A[19:0] l ROM/RAM Controller and Addressing Space - 1M-byte memory address space - 64K-byte I/O space l PSRAM Interface - PSRAM (Pseudo Static RAM) interface with auto-refresh control l Compatible UART Channels - UART speed : maximum baud rate up to 115.2Kbps l Two Independent DMA Channels - Supports serial ports with DMA transfers l Asynchronous Serial Channels - Supports two asynchronous serial channels with hardware handshaking signals l Interrupt Controller - The Interrupt controller with seven maskable external interrupts and one non-maskable external interrupt l Programmable Chip-select Logic - Programmable chip-select logic for memory or I/O bus cycle decoder l l Programmable Wait-state Generator Counter/Timers - Three independent 16-bit timers and one independent watchdog timer l Software Compatible with the 80...