Document
N02L6181A
2Mb Ultra-Low Power Asynchronous CMOS SRAM
128Kx16 bit Overview
The N02L6181A is an integrated memory device containing a 2 Mbit Static Random Access Memory organized as 131,072 words by 16 bits. The device is designed and fabricated using ON Semiconductor’s advanced CMOS technology to provide both high-speed performance and ultra-low power. The base design is the same as ON Semiconductor’s N02L63W3A, which is processed to operate at higher voltages. The device operates with a single chip enable (CE) control and output enable (OE) to allow for easy memory expansion. Byte controls (UB and LB) allow the upper and lower bytes to be accessed independently. The N02L6181A is optimal for various applications where low-power is critical such as battery backup and hand-held devices. The device can operate over a very wide temperature range of -40oC to +85oC and is available in JEDEC standard packages compatible with other standard 128Kb x 16 SRAMs.
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Features
• Single Wide Power Supply Range 1.65 to 2.2 Volts • Very low standby current 0.5µA at 1.8V (Typical) • Very low operating current 1.4mA at 1.8V and 1µs (Typical) • Very low Page Mode operating current 0.5mA at 1.8V and 1µs (Typical) • Simple memory control Single Chip Enable (CE) Byte control for independent byte operation Output Enable (OE) for memory expansion • Low voltage data retention Vcc = 1.2V • Very fast output enable access time 30ns OE access time • Automatic power down to standby mode • TTL compatible three-state output driver • Compact space saving BGA package
Product Family
Part Number N02L6181AB N02L6181AB2 Package Type 48 - BGA Green 48-BGA Operating Temperature Power Supply (Vcc) Speed 70 and 85ns @ 1.65V Standby Operating Current (ISB), Current (Icc), Max Max 10 µA 3 mA @ 1MHz
-40oC to +85oC 1.65V - 2.2V
©2008 SCILLC. All rights reserved. July 2008 - Rev. 4
Publication Order Number: N02L6181A/D
N02L6181A
Pin Configurations
1 A B C D E F G H
LB I/O8 I/O9 VSS VCC
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2
OE UB I/O10 I/O11 I/O12
3
A0 A3 A5 NC NC A14 A12 A9
4
A1 A4 A6 A7 A16 A15 A13 A10
5
A2 CE I/O1 I/O3 I/O4 I/O5 WE A11
6
NC I/O0 I/O2 VCC VSS I/O6 I/O7 NC
I/O14 I/O13 I/O15 NC NC A8
48 Pin BGA (top) 6 x 8 mm
Pin Descriptions
Pin Name A0-A16 WE CE OE LB UB I/O0-I/O15 NC VCC VSS Pin Function Address Inputs Write Enable Input Chip Enable Input Output Enable Input Lower Byte Enable Input Upper Byte Enable Input Data Inputs/Outputs Not Connected Power Ground
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N02L6181A
Functional Block Diagram Word Address Decode Logic Word Mux Input/ Output Mux and Buffers
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Address Inputs A0 - A3
Address Inputs A4 - A16
Page Address
Decode
Logic
8K Page x 16 word x 16 bit RAM Array
I/O0 - I/O7
I/O8 - I/O15 CE WE OE UB LB Control Logic
Functional Description
CE H L L L L WE X X L H H OE X X X
3
UB X H L
1
LB X H L
1
I/O0 - I/O151 High Z High Z Data In Data Out High Z
MODE Standby2 Standby2 Write3 Read Active
POW.