H5DU5182EFR

www.DataSheet4U.com 512Mb DDR SDRAM H5DU5182EFR H5DU5162EFR This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev. 1.0 / Nov. 2009 1 www.DataSheet4U.com 1H5DU5182EFR H5DU5162EFR Revision History Revision No. 0.1 1.0 History Preliminary Release Draft Date Sep. 2009 Nov. 2009 Remark Rev. 1.0 / Nov. 2009 2 www.DataSheet4U.com 1H5DU5182EFR H5DU5162EFR DESCRIPTION The H5DU5182EFR and H5DU5162EFR are a 536,870,912-bit CMOS Double Data Rate(DDR) Synchronous DRAM, ideally suited for the main memory applications which requires large memory density and high bandwidth. This Hynix 512Mb DDR SDRAMs offer fully synchronous operations referenced to both rising and falling edges of the clock. While all addresses and control inputs are latched on the rising edges of the CK (falling edges of the /CK), Data, Data strobes and Write data masks inputs are sampled on both rising and falling edges of it. The data paths are internally pipelined and 2-bit prefetched to achieve very high bandwidth. All input and output voltage levels are compatible with SSTL_2. FEATURES VDD, VDDQ = 2.5V +/- 0.2V All inputs and outputs are compatible with SSTL_2 interface Fully differential clock inputs (CK, /CK) operation Double data rate interface Source synchronous - data transaction aligned to bidirectional data strobe (DQS) x16 device ha...