DatasheetsPDF.com

ICS858011

Integrated Circuit System

1-TO-2 DIFFERNTIAL-TO-CML FANOUT BUFFER

PRELIMINARY Integrated Circuit Systems, Inc. ICS858011 www.DataSheet4U.com LOW SKEW , 1-TO-2 DIFFERENTIAL-TO-CML FANOU...



ICS858011

Integrated Circuit System


Octopart Stock #: O-677073

Findchips Stock #: 677073-F

Web ViewView ICS858011 Datasheet

File DownloadDownload ICS858011 PDF File







Description
PRELIMINARY Integrated Circuit Systems, Inc. ICS858011 www.DataSheet4U.com LOW SKEW , 1-TO-2 DIFFERENTIAL-TO-CML FANOUT BUFFER GENERAL DESCRIPTION The ICS858011 is a high speed 1-to-2 Differentialto-CML Fanout Buffer and is a member of the HiPerClockS™ HiPerClockS™ family of high performance clock solutions from ICS. The ICS858011 is optimized for high speed and very low output skew, making it suitable for use in demanding applications such as SONET, 1 Gigabit and 10 Gigabit Ethernet, and Fibre Channel. The internally terminated differential input and VREF_ AC pin allow other differential signal families such as LVDS, LVHSTL and CML to be easily interfaced to the input with minimal use of external components. The ICS858011 is packaged in a small 3mm x 3mm 16-pin VFQFN package which makes it ideal for use in space-constrained applications. FEATURES 2 differential CML outputs 1 differential LVPECL clock input IN, nIN pair can accept the following differential input levels: LVPECL, LVDS, CML, SSTL Output frequency: > 2.5GHz (typical) Output skew: TBD Part-to-part skew: TBD Additive phase jitter, RMS: <100fs (design target) Propagation delay: 388ps (typical) Operating voltage supply range: VCC = 2.375V to 3.63V, VEE = 0V -40°C to 85°C ambient operating temperature Pin compatible with SY58011U ICS BLOCK DIAGRAM PIN ASSIGNMENT VCC IN 1 VT 2 Q0 nQ0 VREF_AC 3 nIN 4 16 15 14 13 12 11 10 9 5 VCC VCC VEE VEE Q0 nQ0 nQ1 Q1 VEE VEE Q1 nQ1 VREF_AC ICS...




Similar Datasheet




@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site. (Privacy Policy & Contact)