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results in high light-load efficiency. Trade-offs in PFM

noise vs. light-load efficiency are made by varying the

inductor value. Generally, low inductor values produce

a broader efficiency vs. load curve, while higher values

result in higher full-load efficiency (assuming that the

coil resistance remains fixed) and less output voltage

ripple. Penalties for using higher inductor values

include larger physical size and degraded load-tran-

sient response (especially at low input-voltage levels).

Current Sense

The output current of each phase is sensed differential-

ly. Each phase of the MAX8707 has an independent

return path for fully differential current-sense. A low off-

set voltage and high-gain (10V/V) differential current

amplifier at each phase allow low-resistance current-

sense resistors to be used to minimize power dissipa-

tion. Sensing the current at the output of each phase

offers advantages, including less noise sensitivity, more

accurate current sharing between phases, and the flexi-

bility of using either a current-sense resistor or the DC

resistance of the output inductor.

Using the DC resistance (RDCR) of the output inductor

allows higher efficiency. In this configuration, the initial

tolerance and temperature coefficient of the inductor’s

DCR must be accounted for in the output-voltage

droop-error budget. This current-sense method uses an

RC filtering network to extract the current information

from the output inductor (Figure 7). The time constant

of the RC network should match the inductor’s time

constant (L/RDCR):

L

RDCR

= REQ

CSENSE

where CSENSE is the sense capacitor and REQ is the

equivalent sense resistance. To minimize the current-

sense error due to the current-sense inputs’ bias cur-

rent (ICSP_ and ICSN_), choose REQ less than 2kΩ and

use the above equation to determine the sense capaci-

tance (CSENSE). Choose capacitors with 5% tolerance

and resistors with 1% tolerance specifications.

Temperature compensation is recommended for this

current-sense method.

When using a current-sense resistor for accurate out-

put-voltage positioning (CRSP to CRSN for the

MAX8707), differential RC-filter circuits should be used

to cancel the equivalent series inductance of the cur-

rent-sense resistor (Figure 7). Similar to inductor DCR-

sensing methods, the RC filter’s time constant should

match the L/R time constant formed by the current-

sense resistor’s parasitic inductance:

tON(SKIP) =

VOUT

VINfSW

IIDLE

ILOAD ≈ ILOAD(SKIP)

2

0

ON-TIME

TIME

Figure 6. Pulse-Skipping/Discontinuous Crossover Point

LESL

RSENSE

= REQ

CSENSE

where LESL is the equivalent series inductance of the

current-sense resistor, RSENSE is the current-sense

resistance value, CSENSE is the compensation capaci-

tor, and REQ is the equivalent compensation resistance.

Current Balance

The fixed-frequency, multiphase, current-mode archi-

tecture automatically forces the individual phases to

remain current balanced. After the oscillator triggers an

on-time, the controller does not terminate the on-time

until the amplified differential current-sense voltage

reaches the integrated threshold voltage (VREF - VTRC).

This control scheme regulates the peak inductor cur-

rent of each phase, forcing them to remain properly

balanced. Therefore, the average inductor-current vari-

ation depends mainly on the variation in the current-

sense element and inductance value.

Peak/Average Current Limit

The MAX8707 current-limit circuit employs a fast peak

inductor current-sensing algorithm. Once the current-

sense signal (CSP to CSN) of the active phase exceeds

the peak current-limit threshold, the PWM controller ter-

minates the on-time. The MAX8707 also includes a

slower average current sense that uses a current-sense

resistor between CRSP and CRSN to accurately limit

the inductor current. When this average current-sense

threshold is exceeded, the current-limit circuit lowers

the peak current-limit threshold, effectively lowering the

average inductor current. See the Current Limit section

in the Design Procedure section.

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