IS41LV16256A

IS41C16256A IS41LV16256A 256K x 16 (4-MBIT) DYNAMIC RAM WITH EDO PAGE MODE FEATURES TTL compatible inputs and outputs Refresh Interval: 512 cycles/8 ms Refresh Mode : RAS-Only, CAS-before-RAS (CBR), and Hidden JEDEC standard pinout Single power supply 5V ± 10% (IS41C16256A) 3.3V ± 10% (IS41LV16256A) Byte Write and Byte Read operation via two CAS Lead-free available ISSI APRIL 2005 ® www.DataSheet4U.com DESCRIPTION The ISSI IS41C16256A and IS41LV16256A are 262,144 x 16bit high-performance CMOS Dynamic Random Access Memory. Both products offer accelerated cycle access EDO Page Mode. EDO Page Mode allows 512 random accesses within a single row with access cycle time as short as 10ns per 16-bit word. The Byte Write control, of upper and lower byte, makes the IS41C16256A and IS41LV16256A ideal for use in 16 and 32-bit wide data bus systems. These features make the IS41C16256A and IS41LV1626 ideally suited for high band-width graphics, digital signal processing, high-performance computing systems, and peripheral applications. The IS41C16256A and IS41LV16256A are packaged in 40pin 400-mil SOJ and TSOP (Type II). -35 35 11 18 14 60 -60 60 15 30 25 110 Unit ns ns ns ns ns KEY TIMING PARAMETERS Parameter Max. RAS Access Time (tRAC) Max. CAS Access Time (tCAC) Max. Column Address Access Time (tAA) Min. EDO Page Mode Cycle Time (tPC) Min. Read/Write Cycle Time (tRC) PIN CONFIGURATIONS 40-Pin TSOP (Type II) VCC I/O0 I/O1 I/O2 I/O3 VCC I/O4 I/O5 I/O6 I/O7 1 2 3 4 5 6 7 ...