Document
ADC0804S030/040/050
Rev. 02 — 14 August 2008
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Single 8 bits ADC, up to 30 MHz, 40 MHz or 50 MHz
Product data sheet
1. General description
The ADC0806030/040/050 are a family of 8-bit high-speed, low-power Analog-to-Digital Converters (ADC) for professional video and other applications. It converts the analog input signal into 8-bit binary coded digital signals at a maximum sampling rate of 50 MHz. All digital inputs and outputs are Transistor-Transistor Logic (TTL) and CMOS compatible, although a low-level sine wave clock input signal can also be used. The device requires an external source to drive its reference ladder. If the application requires that the reference is driven via internal sources, NXP recommends you use one of the ADC1003S030/040/050 family.
2. Features
I I I I I I I I I I I I I I 8-bit resolution Sampling rate up to 50 MHz DC sampling allowed One clock cycle conversion only High signal-to-noise ratio over a large analog input frequency range (7.8 effective bits at 4.43 MHz full-scale input at fclk = 40 MHz) No missing codes guaranteed In-Range (IR) CMOS output TTL and CMOS levels compatible digital inputs 3 V to 5 V CMOS digital outputs Low-level AC clock input signal allowed External reference voltage regulator Power dissipation only 175 mW (typical) Low analog input capacitance, no buffer amplifier required No sample-and-hold circuit required
3. Applications
I I I I I I I Video data digitizing Radar Transient signal analysis Σ∆ modulators Medical imaging Barcode scanner Global Positioning System (GPS) receiver
NXP Semiconductors
ADC0804S030/040/050
Single 8 bits ADC, up to 30 MHz, 40 MHz or 50 MHz
www.DataSheet4U.com
I Cellular base stations
4. Quick reference data
Table 1. Quick reference data VCCA = V3 to V4 = 4.75 V to 5.25 V; VCCD = V11 to V12 and V28 to V27 = 4.75 V to 5.25 V; VCCO = V13 to V14 = 3.0 V to 5.25 V; AGND and DGND shorted together; Tamb = 0 °C to 70 °C; typical values measured at VCCA = VCCD = 5 V and VCCO = 3.3 V, Vi(a)(p-p) = 2.0 V; CL = 15 pF and Tamb = 25 °C; unless otherwise specified. Symbol VCCA VCCD VCCO ICCA ICCD ICCO INL DNL fclk(max) Parameter analog supply voltage digital supply voltage output supply voltage analog supply current digital supply current output supply current integral non-linearity differential non-linearity maximum clock frequency fclk = 40 MHz; ramp input fclk = 40 MHz ramp input fclk = 40 MHz ramp input ADC0804S030TS ADC0804S040TS ADC0804S050TS Ptot total power dissipation fclk = 40 MHz; ramp input Conditions Min 4.75 4.75 3.0 30 40 50 Typ 5.0 5.0 3.3 18 16 1 ±0.2 ±0.12 175 Max 5.25 5.25 5.25 24 21 2 ±0.5 ±0.22 247 Unit V V V mA mA mA LSB LSB MHz MHz MHz mW
5. Ordering information
Table 2. Ordering information Package Name ADC0804S030TS ADC0804S040TS ADC0804S050TS SSOP28 SSOP28 SSOP28 Description plastic shrink small outline package; 28 leads; body width 5.3 mm plastic shrink small outline package; 28 leads; body width 5.3 mm plastic shrink small outl.