3.3V 1:2 AnyLevel Input to LVDS Fanout Buffer /Translator
Description
NB4N11S 3.3 V 1:2 AnyLevelâ„¢ Input to LVDS Fanout Buffer / Translator
The NB4N11S is a differential 1:2 Clock or Data Receiver and will accept AnyLevelTM input signals: LVPECL, CML, LVCMOS, LVTTL, or LVDS. These signals will be translated to LVDS and two identical copies of Clock or Data will be distributed, operating up to 2.0 GHz or 2.5 Gb/s, respectively. ...