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HANBit
HMD16M32M8G
64Mbyte(16Mx32) 72-pin FP Mode 4K Ref. SIMM Design 5V Part No. HMD16M32M8G
GENERAL DESCRIPTION
The HMD16M32M8G is a 16Mbit x 32 dynamic RAM high-density memory module. The module consists of eight CMOS 16M x 4bit DRAMs in 32-pin TSOPII packages mounted on a 72-pin, double-sided, FR-4-printed circuit board. A 0.1uF decoupling capacitor is mounted on the printed circuit board for each DRAM components. The module is a Single In-line Memory Module with edge connections and is intended for mounting in to 72-pin edge connector sockets. All module components may be powered from a single 5V DC power supply and all inputs and outputs are TTL-compatible.
PIN ASSIGNMENT FEATURES
wHMD16M32M8G: www.DataSheet4U.com 4K Cycles/64ms Refresh Gold w Access times : 50, 60ns w High-density 64MByte design w Single + 5V ±0.5V power supply w JEDEC standard pinout w FP(Fast Page) mode operation w TTL compatible inputs and outputs w FR4-PCB design
PIN SYMBOL PIN SYMBOL PIN SYMBOL PIN SYMBOL
1 2 3 4 5 6 7 8 9 10 11 -5 -6 M 12 13 14 15 16 17 18 tRC 90ns 110ns
Vss DQ0 DQ16 DQ1 DQ17 DQ2 DQ18 DQ3 DQ19 Vcc NC A0 A1 A2 A3 A4 A5 A6
19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36
A10 DQ4 DQ20 DQ5 DQ21 DQ6 DQ22 DQ7 DQ23 A7 A11 Vcc A8 A9 NC /RAS2 NC NC
37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54
NC NC Vss /CAS0 /CAS2 /CAS3 /CAS1 /RAS0 NC NC /W NC DQ8 DQ24 DQ9 DQ25 DQ10 DQ26
55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72
DQ11 DQ27 DQ12 DQ28 Vcc DQ29 DQ13 DQ30 DQ14 DQ31 DQ15 NC PD1 PD2 PD3 PD4 NC Vss
OPTIONS
w Timing 50ns access 60ns access w Packages 72-pin SIMM
MARKING
PERFORMANCE RANGE
SPEED -5 -6 tRAC 50ns 60ns tCAC 13ns 15ns
wPART IDENTIFICATION
PRESENCE DETECT PINS PD1 PD2 PD3 PD4 50ns Vss NC Vss Vss 60ns Vss NC NC NC
URL: www.hbe.co.kr REV. 1.0 (August. 2002)
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FUNCTIONAL BLOCK DIAGRAM
HMD16M32M8G
/CAS0 /RAS0
CAS RAS OE W
U0
A0-A11
DQ0 DQ1 DQ2 DQ3
DQ0-DQ3
CAS RAS OE W
U1
A0-A11
DQ0 DQ1 DQ2 DQ3
DQ4-DQ7
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/CAS1
CAS RAS OE W
U2
A0-A11
DQ0 DQ1 DQ2 DQ3
DQ8-DQ11
CAS RAS OE W
U3
A0-A11
DQ0 DQ1 DQ2 DQ3
DQ12-DQ15
/CAS2
/RAS2
CAS RAS OE W
U4
A0-A11
DQ0 DQ1 DQ2 DQ3
DQ16-DQ19
CAS RAS OE W
U5
A0-A11
DQ0 DQ1 DQ2 DQ3
DQ20-DQ23
/CAS3
CAS RAS OE W
U6
A0-A11
DQ0 DQ1 DQ2 DQ3
DQ24-DQ27
CAS RAS OE W
U7
A0-A11
DQ0 DQ1 DQ2 DQ3
DQ28-DQ31
/W A0-A11
Vcc
0.1uF or 0.22uF Capacitor for each DRAM
To all DRAMs
Vss
URL: www.hbe.co.kr REV. 1.0 (August. 2002)
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ABSOLUTE MAXIMUM RATINGS
PARAMETER Voltage on Any Pin Relative to Vss Voltage on Vcc Supply Relative to Vss Power Dissipation Storage Temperature SYMBOL VIN ,OUT Vcc PD TSTG
HMD16M32M8G
RATING -1V to 7.0V -1V to 7.0V 6W -55oC to 150oC
Short Circuit Output Current IOS 50mA w Permanent device damage may occur if " Absolute Maximum Ratings" are exceeded. Functional operation should be restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
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DC OPERATING CONDITIONS
( Voltage reference to VSS, TA=0 to 70 o C ) PARAMETER Supply Voltage Ground Input High Voltage Input Low Voltage SYMBOL Vcc Vss VIH VIL MIN 4.5 0 2.4 -1.0 TYP. 5.0 0 MAX 5.5 0 Vcc+1 0.8 UNIT V V V V
DC AND OPERATING CHARACTERISTICS
SYMBOL ICC1 -6 ICC2 -5 ICC3 -6 -5 ICC4 -6 ICC5 -5 ICC6 -6 Il(L) IO(L) VOH VOL -60 -5 2.4 800 5 5 0.4 MA µA µA V V 560 8 880 MA MA MA 800 720 MA MA 800 16 880 MA MA MA SPEED -5 MIN MAX 880 UNITS MA
URL: www.hbe.co.kr REV. 1.0 (August. 2002)
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ICC1 : Operating Current * (/RAS , /CAS , Address cycling @t RC=min.) ICC2 : Standby Current ( /RAS=/CAS=VIH ) ICC3 : /RAS Only Refresh Current * ( /CAS=V IH, /RAS, Address cycling @tRC=min ) ICC4 : Fast Page Mode Current * (/RAS=VIL, /CAS, Address cycling @tPC=min ) ICC5 : Standby Current (/RAS=/CAS=Vcc-0.2V ) ICC6 : /CAS-Before-/RAS Refresh Current * (/RAS and /CAS cycling @t RC=min ) IIL : Input Leakage Current (Any input 0V ≤ VIN ≤ 6.5V, all other pins not under test = 0V) IOL : Output Leakage Current (Data out is disabled, 0V ≤ VOUT ≤ 5.5V VOH : Output High Voltage Level (IOH= -5mA ) VOL : Output Low Voltage Level (IOL = 4.2mA )
HMD16M32M8G
* NOTE: ICC1, ICC3, ICC4 and ICC6 are dependent on output loading and cycle rates. Specified values are obtained with the output open. ICC is specified as an average current. In ICC1 and ICC3, address cad be changed maximum once
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while /RAS=VIL. In ICC4, address can be changed maximum once within one page mode cycle.
CAPACITANCE
( TA=25 C, Vcc = 5V, f = 1Mz ) SYMBOL CIN1 C IN2 CIN3 CIN4 CDQ1
o
o
DESCRIPTION Input Capacitance (A0-A11) Input Capacitance (/W) Input Capacitance (/RAS0) Input Capacitance (/CAS0-/CAS3) Input/Output Capacitance (DQ0-31)
MIN -
MAX 40 56 58 54 57
UNITS pF pF pF pF pF
AC CHARACTERISTICS
( 0 C ≤ TA ≤ .