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QL3025 Dataheets PDF



Part Number QL3025
Manufacturers QuickLogic Corporation
Logo QuickLogic Corporation
Description PLD Gate pASIC 3 FPGA Combining High Performance and High Density
Datasheet QL3025 DatasheetQL3025 Datasheet (PDF)

QL3025 pASIC 3 FPGA Data Sheet •••••• 25,000 Usable PLD Gate pASIC 3 FPGA Combining High Performance and High Density Device Highlights High Performance & High Density • 25,000 Usable PLD Gates with 204 I/Os • 300 MHz 16-bit www.DataSheet4U.com Four Low-Skew Distributed Networks • Two array clock/control networks available Counters, 400 MHz Datapaths • 0.35 µm four-layer metal non-volatile CMOS process for smallest die sizes Easy to Use / Fast Development Cycles • 100% routable with 100% uti.

  QL3025   QL3025


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